Some updating of slides

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2024-09-28 20:41:34 +02:00
parent bf09b0b6f9
commit ca81974866
3 changed files with 253 additions and 85 deletions

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@@ -223,7 +223,6 @@
}
\begin{frame}{Software Library}
Software support library
\begin{columns}
\begin{column}{0.5\textwidth}
\begin{itemize}
@@ -235,7 +234,6 @@
\item Execution
\begin{itemize}
\item Generation of RD and WR requests
\item Insetion of memory barriers
\end{itemize}
\end{itemize}
\end{column}
@@ -270,7 +268,7 @@
\begin{frame}{Virtual Prototype Platform}
\begin{columns}
\begin{column}{0.5\textwidth}
\begin{column}{0.4\textwidth}
\begin{itemize}
\item ARM processor model
\item Bare-metal kernel
@@ -281,7 +279,7 @@
\end{itemize}
\end{itemize}
\end{column}
\begin{column}{0.5\textwidth}
\begin{column}{0.6\textwidth}
\begin{figure}
\includesvg[width=0.8\textwidth]{images/bare_metal.svg}
\end{figure}
@@ -345,27 +343,27 @@
}
\begin{frame}{System Configuration}
\begin{columns}[t]
\begin{column}{0.5\textwidth}
% \begin{columns}[t]
% \begin{column}{0.5\textwidth}
Two simulated systems:
\begin{itemize}
\item Generic ARM system
\item Infinite compute system
\begin{itemize}
\item Unrealistic high frequency of 100 GHz
\item Infinite CPU clock frequency
\item Completely memory bound
\item Lower bound of possible speedup
\item Lower bound of possible PIM speedup
\end{itemize}
\end{itemize}
\end{column}
\begin{column}{0.5\textwidth}
Two real GPUs using HBM2:
\begin{itemize}
\item AMD RX Vega 56
\item NVIDIA Tesla V100
\end{itemize}
\end{column}
\end{columns}
% \end{column}
% \begin{column}{0.5\textwidth}
% Two real GPUs using HBM2:
% \begin{itemize}
% \item AMD RX Vega 56
% \item NVIDIA Tesla V100
% \end{itemize}
% \end{column}
% \end{columns}
\end{frame}
\begin{frame}{Speedups / Generic ARM System}
@@ -398,24 +396,6 @@
\item GPU has no speculative execution
}
\begin{frame}{Runtimes / Vector Benchmarks}
\begin{figure}
\includesvg[width=0.8\textwidth]{images/runtimes_vector.svg}
\end{figure}
\end{frame}
\note[itemize]{
\item Real GPUs use multiple memory channels
\item Memory barriers
\item Also architectural differences
}
\begin{frame}{Runtimes / Matrix Benchmarks}
\begin{figure}
\includesvg[width=0.8\textwidth]{images/runtimes_matrix.svg}
\end{figure}
\end{frame}
\begin{frame}{Conclusion and Future Work}
\textbf{Conclusion}
\begin{itemize}
@@ -500,9 +480,26 @@
\end{figure}
\end{frame}
\note[itemize]{
\item Data layout in program and address mapping must match
}
\begin{frame}{Runtimes / Vector Benchmarks}
\begin{figure}
\includesvg[width=0.8\textwidth]{images/runtimes_vector.svg}
\end{figure}
\end{frame}
\note[itemize]{
\item Real GPUs use multiple memory channels
\item Memory barriers
\item Also architectural differences
}
\begin{frame}{Runtimes / Matrix Benchmarks}
\begin{figure}
\includesvg[width=0.8\textwidth]{images/runtimes_matrix.svg}
\end{figure}
\end{frame}
\end{document}