75 Commits

Author SHA1 Message Date
0da95b3a81 Add .helix and .latexindent 2025-03-24 21:22:04 +01:00
8a357491af Add author information in metadata 2024-09-14 15:21:22 +02:00
07baea1b2c Last correction from Lukas 2024-03-17 18:48:08 +01:00
5235553962 Smaller fixes 2024-03-13 14:45:04 +01:00
e0bd8a6cf3 Small fix in intro 2024-03-10 19:13:19 +01:00
e1f7033883 Smaller fixes 2024-03-09 19:34:41 +01:00
9c2f34ec19 Smaller fixes 2024-03-09 19:26:52 +01:00
4ddec908db Remove cite from List of Tables 2024-03-08 23:37:36 +01:00
0e9898f8fc Error correction 2024-03-08 23:31:44 +01:00
4430c10aad Smaller refactorings in result chapter 2024-03-08 23:26:59 +01:00
42ef5e7672 Write out some numbers 2024-03-08 23:09:53 +01:00
e999f46141 Apply Johannes' remarks 2024-03-08 23:00:49 +01:00
c0c9afc891 Apply Lukas' remarks 2024-03-08 22:36:31 +01:00
b04001698b Refactor Introduction 2024-03-08 21:59:17 +01:00
2e0fb713d6 Better abstract 2024-03-08 20:47:53 +01:00
f0956a6246 Complete the result chapter and conclusion 2024-03-08 18:48:22 +01:00
4074a60f43 Insert new simulation results 2024-03-07 15:33:19 +01:00
123c7e0b25 Real hardware plots 2024-03-06 23:26:38 +01:00
494662da66 Appendix 2024-03-01 23:22:30 +01:00
30db51a8de Samsung comparison 2024-03-01 19:44:43 +01:00
47796cdae5 Vector simulations 2024-03-01 15:34:40 +01:00
ee2405aaa9 First simulation plots 2024-02-28 20:33:12 +01:00
b197caa00b Smaller changes 2024-02-27 21:37:37 +01:00
f0014161d9 Fix bug in Simulation chapter 2024-02-27 19:10:22 +01:00
6dc73c0b04 Add complete matrix memory layout example figure 2024-02-24 18:21:37 +01:00
860e2e3ca6 Fix DNN graphic padding 2024-02-22 22:23:00 +01:00
33132ea541 Beginning of simulation chapter 2024-02-21 23:40:28 +01:00
96311f2308 Clarify layout of additional matrix rows 2024-02-21 16:35:12 +01:00
2e6187c25a Minor fixes and compiler-based approach in colcusion 2024-02-19 17:12:44 +01:00
e597305a58 Fixes in kernel chapter and conclusion 2024-02-17 16:18:19 +01:00
cf0b8c3984 Fixes until Library chapter 2024-02-17 15:47:38 +01:00
a49d409d4c Fixes in PIM and VP chapter 2024-02-17 13:02:14 +01:00
e386a16993 Fixes in DRAM chapter 2024-02-17 11:25:18 +01:00
779461b515 Conclusion erste Version 2024-02-17 10:58:47 +01:00
0bdbd2ddc9 Add abstract 2024-02-16 22:01:25 +01:00
db35568157 Kernel chapter complete 2024-02-16 19:38:11 +01:00
5055b0eb8a GEMV kernel 2024-02-16 17:37:21 +01:00
21c2489766 Memory Configuration 2024-02-16 16:36:06 +01:00
c04c3fa829 Start of kernel implementation 2024-02-16 15:20:28 +01:00
df8ef883b3 Start of kernel 2024-02-15 21:09:14 +01:00
1e993eeb28 Software Library chapter complete 2024-02-15 17:48:35 +01:00
88d46788c7 Data Structures 2024-02-15 14:49:08 +01:00
8c655cc993 Introduction to library chapter 2024-02-14 21:44:54 +01:00
c4f9383dad Implementation of the virtual machine 2024-02-14 17:32:23 +01:00
89dffecdf0 Switch from HBM-PIM to PIM-HBM of FIMDRAM acronym 2024-02-14 10:27:37 +01:00
c78b3c12cb Minor changes 2024-02-13 16:07:33 +01:00
8dd5b7dacf DRAMSys and VP chapter completed 2024-02-13 15:49:32 +01:00
08a760edef VPs and gem5 2024-02-13 14:20:26 +01:00
4a842fa700 Use cleveref 2024-02-13 09:27:16 +01:00
cf6f1b9f1b Switch to biblatex 2024-02-12 23:16:57 +01:00