Complete the result chapter and conclusion

src/chapters/introduction.tex

@@ -28,8 +28,8 @@ In recent years, domain-specific accelerators, such as \acp{gpu} or \acp{tpu} ha
 However, research must also take into account off-chip memory - moving data between the computation unit and the \ac{dram} is very costly, as fetching operands consumes more power than performing the computation on them itself.
 While performing a double precision floating point operation on a $\qty{28}{\nano\meter}$ technology might consume an energy of about $\qty{20}{\pico\joule}$, fetching the operands from \ac{dram} consumes almost 3 orders of magnitude more energy at about $\qty{16}{\nano\joule}$ \cite{dally2010}.
 
-Furthermore, many types of \acp{dnn} used for language and speech processing, such as \acp{rnn}, \acp{mlp} and some layers of \acp{cnn}, are severely limited by the memory bandwidth that the \ac{dram} can provide, making them \textit{memory-bounded} \cite{he2020}.
-In contrast, compute-intensive workloads, such as visual processing, are referred to as \textit{compute-bounded}.
+Furthermore, many types of \acp{dnn} used for language and speech processing, such as \acp{rnn}, \acp{mlp} and some layers of \acp{cnn}, are severely limited by the memory bandwidth that the \ac{dram} can provide, making them \textit{memory-bound} \cite{he2020}.
+In contrast, compute-intensive workloads, such as visual processing, are referred to as \textit{compute-bound}.
 
 \begin{figure}[!ht]
 	\centering
@@ -41,9 +41,9 @@ In contrast, compute-intensive workloads, such as visual processing, are referre
 In the past, specialized types of \ac{dram} such as \ac{hbm} have been able to meet the high bandwidth requirements.
 However, recent \ac{ai} technologies require even greater bandwidth than \ac{hbm} can provide \cite{kwon2021}.
 
-All things considered, to meet the need for more energy-efficient computing systems, which are increasingly becoming memory-bounded, new approaches to computing are required.
+All things considered, to meet the need for more energy-efficient computing systems, which are increasingly becoming memory-bound, new approaches to computing are required.
 This has led researchers to reconsider past \ac{pim} architectures and advance them further \cite{lee2021}.
-\Ac{pim} integrates computational logic into the \ac{dram} itself, to exploit minimal data movement cost and extensive internal data parallelism \cite{sudarshan2022}, making it a good fit for memory-bounded problems.
+\Ac{pim} integrates computational logic into the \ac{dram} itself, to exploit minimal data movement cost and extensive internal data parallelism \cite{sudarshan2022}, making it a good fit for memory-bound problems.
 
 This work analyzes various \ac{pim} architectures, identifies the challenges of integrating them into state-of-the-art \acp{dram}, examines the changes required in the way applications lay out their data in memory and explores a \ac{pim} implementation from one of the leading \ac{dram} vendors.
 The remainder of this work is structured as follows: