First simulation plots

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2024-02-28 20:33:12 +01:00
parent b197caa00b
commit ee2405aaa9
23 changed files with 299 additions and 30 deletions

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@@ -22,7 +22,7 @@ Because the charge stored in each cell is very small, so-called \acp{psa} are ne
\begin{figure}
\centering
\includegraphics[width=\linewidth]{images/psa}
\caption[\ac{psa} of an open bitline architecture]{\ac{psa} of an open bitline architecture \cite{jacob2008} \cite{jung2017a}.}
\caption[\ac{psa} of an open bitline architecture.]{\ac{psa} of an open bitline architecture \cite{jacob2008} \cite{jung2017a}.}
\label{img:psa}
\end{figure}
@@ -39,7 +39,7 @@ The \cref{img:bank} summarizes the basic architecture of a single storage device
\begin{figure}
\centering
\includegraphics[width=\linewidth]{images/bank}
\caption[Architecture of a single DRAM device]{Architecture of a single DRAM device \cite{jung2017a}.}
\caption[Architecture of a single DRAM device.]{Architecture of a single DRAM device \cite{jung2017a}.}
\label{img:bank}
\end{figure}
@@ -83,7 +83,7 @@ Because banks can be controlled independently, one bank can be outputting the ne
\bitbox{3}[bgcolor=verylightgray]{}
\end{bytefield}
\caption[Exemplary address mapping scheme]{Exemplary address mapping scheme for an input address of size 32.}
\caption{Exemplary address mapping scheme for an input address of size 32.}
\label{img:bank_interleaving}
\end{figure}
@@ -102,7 +102,7 @@ Several \ac{dram} dies are stacked on top of each other and connected with \acp{
\begin{figure}
\centering
\includegraphics[width=0.8\linewidth]{images/sip}
\caption[Cross-section view of an \ac{hbm} \ac{sip}]{Cross-section view of a \ac{hbm} \ac{sip} \cite{lee2021}.}
\caption[Cross-section view of an \ac{hbm} \ac{sip}.]{Cross-section view of a \ac{hbm} \ac{sip} \cite{lee2021}.}
\label{img:sip}
\end{figure}
Such a cube is then placed onto a common silicon interposer that connects the \ac{dram} to its host processor.
@@ -123,7 +123,7 @@ In the center of the die, the \acp{tsv} connect the die to the next die above it
\begin{figure}
\centering
\includegraphics[width=0.8\linewidth]{images/hbm}
\caption[\aca{hbm} memory die architecture]{\aca{hbm} memory die architecture \cite{lee2021}.}
\caption[\aca{hbm} memory die architecture.]{\aca{hbm} memory die architecture \cite{lee2021}.}
\label{img:hbm}
\end{figure}