First simulation plots
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@@ -22,7 +22,7 @@ Because the charge stored in each cell is very small, so-called \acp{psa} are ne
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\begin{figure}
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\centering
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\includegraphics[width=\linewidth]{images/psa}
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\caption[\ac{psa} of an open bitline architecture]{\ac{psa} of an open bitline architecture \cite{jacob2008} \cite{jung2017a}.}
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\caption[\ac{psa} of an open bitline architecture.]{\ac{psa} of an open bitline architecture \cite{jacob2008} \cite{jung2017a}.}
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\label{img:psa}
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\end{figure}
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@@ -39,7 +39,7 @@ The \cref{img:bank} summarizes the basic architecture of a single storage device
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\begin{figure}
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\centering
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\includegraphics[width=\linewidth]{images/bank}
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\caption[Architecture of a single DRAM device]{Architecture of a single DRAM device \cite{jung2017a}.}
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\caption[Architecture of a single DRAM device.]{Architecture of a single DRAM device \cite{jung2017a}.}
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\label{img:bank}
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\end{figure}
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@@ -83,7 +83,7 @@ Because banks can be controlled independently, one bank can be outputting the ne
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\bitbox{3}[bgcolor=verylightgray]{}
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\end{bytefield}
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\caption[Exemplary address mapping scheme]{Exemplary address mapping scheme for an input address of size 32.}
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\caption{Exemplary address mapping scheme for an input address of size 32.}
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\label{img:bank_interleaving}
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\end{figure}
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@@ -102,7 +102,7 @@ Several \ac{dram} dies are stacked on top of each other and connected with \acp{
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\begin{figure}
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\centering
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\includegraphics[width=0.8\linewidth]{images/sip}
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\caption[Cross-section view of an \ac{hbm} \ac{sip}]{Cross-section view of a \ac{hbm} \ac{sip} \cite{lee2021}.}
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\caption[Cross-section view of an \ac{hbm} \ac{sip}.]{Cross-section view of a \ac{hbm} \ac{sip} \cite{lee2021}.}
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\label{img:sip}
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\end{figure}
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Such a cube is then placed onto a common silicon interposer that connects the \ac{dram} to its host processor.
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@@ -123,7 +123,7 @@ In the center of the die, the \acp{tsv} connect the die to the next die above it
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\begin{figure}
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\centering
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\includegraphics[width=0.8\linewidth]{images/hbm}
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\caption[\aca{hbm} memory die architecture]{\aca{hbm} memory die architecture \cite{lee2021}.}
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\caption[\aca{hbm} memory die architecture.]{\aca{hbm} memory die architecture \cite{lee2021}.}
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\label{img:hbm}
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\end{figure}
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