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Switch from HBM-PIM to PIM-HBM of FIMDRAM acronym

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Derek Christ
2024-02-14 10:27:37 +01:00
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src/chapters/vp.tex
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@@ -10,14 +10,14 @@ To perform such simulations, it is necessary to use a simulation model, commonly
\Acp{vp} act as executable software models of a physical hardware system, allowing the architecture of the system to be completely simulated in software.
This in turn enables the software development and the identification of potential platform-specific software bugs without the need for the actual hardware implementation \cite{antonino2018}.
\Acp{vp} provide full visibility and control over the entire simulated system, helping to identify bottlenecks and potential specification errors in the design.
They also allow the exploration of the design space, for example, in the case of \ac{hbm}-\ac{pim}, this includes the variation of the ratio of \ac{pim} units to the number of memory banks and the effect on the performance of the \ac{pim} microkernel.
They also allow the exploration of the design space, for example, in the case of \aca{fimdram}, this includes the variation of the ratio of \ac{pim} units to the number of memory banks and the effect on the performance of the \ac{pim} microkernel.
However, using the appropriate level of abstraction in the software model is critical to make well-informed statements about the system without compromising the performance of the software model itself by being at a too low level, such as the \ac{rtl}.
A viable compromise is the \ac{at} abstraction level within the \ac{tlm} technique, which is widely used in the SystemC \cite{systemc2023} virtual prototyping standard.
The \ac{at} coding style simplifies the modeling of communication between different system components by modeling it only through function calls that are synchronized at different points in time.
This approach eliminates the need to simulate complex bus protocols while maintaining the accuracy required for design space exploration and performance evaluation.
Two different \ac{vp} simulation frameworks used in the implementation of the \ac{hbm}-\ac{pim} software model, namely gem5 and DRAMSys, are introduced in the following sections.
Two different \ac{vp} simulation frameworks used in the implementation of the \aca{fimdram} software model, namely gem5 and DRAMSys, are introduced in the following sections.
\subsection{The gem5 Simulator}
@@ -57,6 +57,6 @@ At the frontend of DRAMSys, a variety of initiators can be connected, including
In cases where such a processor model is used to execute a user application, DRAMSys uses its internal memory model to store and retrieve the requested data, rather than ignoring the contents of the request.
DRAMSys provides support for the latest \ac{jedec} \ac{dram} standards, including \aca{hbm}.
Thus, gem5 and DRAMSys together form a robust platform for implementing and researching the \ac{hbm}-\ac{pim} architecture introduced by Samsung, entirely through a software model.
Thus, gem5 and DRAMSys together form a robust platform for implementing and researching the \aca{fimdram} architecture introduced by Samsung, entirely through a software model.
To achieve this, the \aca{hbm} \ac{dram} model must be extended to include the processing units integrated into each \ac{pch}.
The following section provides a detailed description of this implementation of \ac{hbm}-\ac{pim}, the \ac{pim} virtual machine.
The following section provides a detailed description of this implementation of \aca{fimdram}, the \ac{pim} virtual machine.