2.9 KiB
2.9 KiB
layout, figureUrl, figureCaption, figureFootnoteNumber
| layout | figureUrl | figureCaption | figureFootnoteNumber |
|---|---|---|---|
| figure | /dnn.svg | A fully connected DNN layer | 1 |
Processing-in-Memory
Applicable Workloads
He et al. „Newton: A DRAM-maker’s Accelerator-in-Memory (AiM) Architecture for Machine Learning“, 2020.
Processing-in-Memory
Architectures
Possible placements of compute logic1:
- Inside the memory subarray
- In the PSA region near a subarray
- Outside the bank in its peripheral region
- In the I/O region of the memory
The nearer the computation is to the memory cells, the higher the achievable bandwidth!
Sudarshan et al. „A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions“, 2022.
layout: figure figureUrl: /hbm-pim.svg figureCaption: Architecture of PIM-HBM figureFootnoteNumber: 1
Processing-in-Memory
Samsung's HBM-PIM
Lee et al. „Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product“, 2021.
layout: figure figureUrl: /pu.svg figureCaption: Architecture of a PIM processing unit figureFootnoteNumber: 1
Processing-in-Memory
Samsung's HBM-PIM
Lee et al. „Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product“, 2021.
layout: figure figureUrl: /gemv.svg figureCaption: Procedure to perform a (128×8)×(128) GEMV operation figureFootnoteNumber: 1
Processing-in-Memory
Samsung's HBM-PIM
Lee et al. „Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product“, 2021.
layout: figure figureUrl: /layout.svg figureCaption: Mapping of the weight matrix onto the memory banks
Processing-in-Memory
Samsung's HBM-PIM
Processing-in-Memory
Research
simulation models needed
research should not only focus on hardware but also explore the software side!
deswegen baue ich einen virutal protoype