## Simulations
### Microbenchmarks
<hr/>

<br>
<br>

<div class="grid grid-cols-2 gap-4">
<div>

- Vector benchmarks (BLAS level 1)
    - VADD: $z = x + y$ 
    - VMUL: $z = x \cdot y$
    - HAXPY: $z = a \cdot x + y$

- Vector-Matrix benchmarks (BLAS level 2)
    - GEMV: $z = A \cdot x$
    - DNN Layer: $z = ReLU(A \cdot x)$

</div>
<div>

| Level | Vector | GEMV          | DNN           |
|-------|--------|---------------|---------------|
| X1    | (2M)   | (1024 x 4096) | (256 x 256)   |
| X2    | (4M)   | (2048 x 4096) | (512 x 512)   |
| X3    | (8M)   | (4096 x 8192) | (1024 x 1024) |
| X4    | (16M)  | (4096 x 8192) | (2048 x 2048) |

</div>
</div>

---

## Simulations
### System Configuration
<hr/>

- Two system configurations:
    - ARM 3GHz
    - ARM Infinite

- TODO ... GPU und so

---
layout: figure
figureUrl: /speedup_normal.svg
figureCaption: Speedups of PIM compared to non-PIM
---

## Simulations
### Speedups / ARM System
<hr/>

---
layout: figure
figureUrl: /speedup_inf.svg
figureCaption: Speedups of PIM compared to non-PIM
---

## Simulations
### Speedups / Infinite Compute System
<hr/>

---
layout: figure
figureUrl: /samsung.svg
figureCaption: Speedups of Samsung for VADD and GEMV
figureFootnoteNumber: 1
---

## Simulations
### Speedups / Samsung
<hr/>

<Footnotes separator>
  <Footnote :number=1>
  Lee et al. „Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product“, 2021.
</Footnote>
</Footnotes>

---
layout: figure
figureUrl: /runtimes_vector.svg
figureCaption: Runtimes for Vector Benchmarks
---

## Simulations
### Runtimes / Vector Benchmarks
<hr/>

---
layout: figure
figureUrl: /runtimes_matrix.svg
figureCaption: Runtimes for Matrix Benchmarks
---

## Simulations
### Runtimes / Matrix Benchmarks
<hr/>