47 lines
940 B
VHDL
47 lines
940 B
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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entity phys_can_sim is
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generic(
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peer_num : integer --number of can participants connected to the bus
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);
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port(
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rst : in std_logic;
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rx_vector : out std_logic_vector(peer_num - 1 downto 0); --vector containing all rx_signals
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tx_vector : in std_logic_vector(peer_num - 1 downto 0) --vector containing all tx_signals
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);
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end entity;
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architecture behav of phys_can_sim is
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begin
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process(tx_vector, rst)
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variable value : std_logic := '1';
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variable i : integer;
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begin
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if rst = '1' then
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rx_vector <= (others => '1');
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else
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value := '1';
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for i in 0 to peer_num - 1 loop
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value := value and tx_vector(i);
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end loop;
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if value = '1' then
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rx_vector <= (others => '1');
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else
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rx_vector <= (others => '0');
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end if;
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end if;
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end process;
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end architecture;
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--TODO: physical transmission delay simulation if needed (in a later simulation stage) |