50 lines
1.2 KiB
VHDL
50 lines
1.2 KiB
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity scrolling_timer is
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port(
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clk : in std_logic;
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rst : in std_logic;
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cnt_start : in std_logic;
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cnt_done : out std_logic;
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cnt_value : in std_logic_vector(31 downto 0)
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);
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end entity scrolling_timer;
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architecture Behavioral of scrolling_timer is
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signal counter : std_logic_vector(31 downto 0);
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signal done : std_logic;
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signal counting : std_logic;
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begin
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process(clk)
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begin
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if clk'event and clk='1' then
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if rst = '1' then
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counter <= x"00000000";
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done <= '0';
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counting <= '0';
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else
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counter <= x"00000000";
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done <= '0';
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if counter >= cnt_value and counting = '1' then
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counter <= x"00000000";
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done <= '1';
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counting <= '0';
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elsif counting = '1' then
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counter <= std_logic_vector(unsigned(counter) + 1);
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elsif counting = '0' and cnt_start = '1' then
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counting <= '1';
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end if;
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end if;
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end if;
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end process;
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cnt_done <= done;
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end Behavioral;
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