Files
lt16lab/soc/peripheral/scrolling_controller.vhd

148 lines
5.1 KiB
VHDL

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity scrolling_controller is
port(
clk : in std_logic;
rst : in std_logic;
on_off : in std_logic;
cnt_start : out std_logic;
cnt_done : in std_logic;
next_char : out std_logic;
hex_char : in std_logic_vector(4 downto 0);
seg_data : out std_logic_vector(3 downto 0);
seg_off : out std_logic;
seg_shift : out std_logic;
seg_write : out std_logic;
seg_clear : out std_logic;
buffer_elements : in std_logic_vector(4 downto 0)
);
end entity scrolling_controller;
architecture Behavioral of scrolling_controller is
type state_type is (s_off, s_wait, s_update);
signal state : state_type;
signal sig_seg_shift : std_logic;
signal sig_seg_write : std_logic;
signal sig_seg_clear : std_logic;
signal current_element : integer range 0 to 16;
signal current_resetted : std_logic;
begin
process(clk)
begin
if clk'event and clk='1' then
if rst = '1' then
state <= s_off;
cnt_start <= '0';
next_char <= '0';
sig_seg_shift <= '0';
sig_seg_write <= '0';
sig_seg_clear <= '0';
current_element <= 0;
current_resetted <= '0';
else
case state is
when s_off =>
current_element <= 0;
if on_off = '0' then
state <= s_off;
sig_seg_shift <= '0';
sig_seg_write <= '0';
sig_seg_clear <= '0';
cnt_start <= '0';
next_char <= '0';
else
state <= s_wait;
sig_seg_shift <= '0';
sig_seg_write <= '0';
sig_seg_clear <= '0';
cnt_start <= '1';
next_char <= '0';
end if;
when s_wait =>
if on_off = '1' then
state <= s_off;
sig_seg_clear <= '1';
cnt_start <= '0';
next_char <= '0';
elsif cnt_done = '0' then
state <= s_wait;
sig_seg_shift <= '0';
sig_seg_write <= '0';
sig_seg_clear <= '0';
cnt_start <= '0';
next_char <= '0';
else -- cnt_done = '1'
state <= s_update;
sig_seg_shift <= '0';
sig_seg_write <= '0';
sig_seg_clear <= '0';
cnt_start <= '1';
if current_element < unsigned(buffer_elements) then
next_char <= '1';
end if;
current_resetted <= '0';
if current_element = 15 then
current_element <= 0;
current_resetted <= '1';
else
current_element <= current_element + 1;
end if;
end if;
when s_update =>
if on_off = '0' then
state <= s_wait;
sig_seg_shift <= '1';
sig_seg_write <= '1';
sig_seg_clear <= '0';
cnt_start <= '0';
next_char <= '0';
else
state <= s_off;
sig_seg_clear <= '1';
cnt_start <= '0';
next_char <= '0';
end if;
end case;
end if;
end if;
end process;
process(clk)
begin
if clk'event and clk='1' then
if rst = '1' then
seg_data <= (others => '0');
seg_off <= '0';
seg_shift <= '0';
seg_write <= '0';
seg_clear <= '1';
else
if current_element < unsigned(buffer_elements) and not (current_resetted = '1' and unsigned(buffer_elements) /= 16) then
seg_data <= hex_char(3 downto 0);
seg_off <= hex_char(4);
else
seg_data <= x"0";
seg_off <= '1';
end if;
seg_clear <= sig_seg_clear;
seg_write <= sig_seg_write;
seg_shift <= sig_seg_shift;
end if;
end if;
end process;
end Behavioral;