-- See the file "LICENSE" for the full license governing this code. --

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.numeric_std.all;

library work;
use work.lt16x32_internal.all;
use work.lt16x32_global.all;
use work.wishbone.all;
use work.config.all;

package lt16soc_peripherals is

    component can_vhdl_top is
        generic(
            memaddr	 : generic_addr_type;
            addrmask : generic_mask_type
        );
        port(
            clk	 : in std_logic;
            rstn	 : in std_logic;
            wbs_i	 : in wb_slv_in_type;
            wbs_o	 : out wb_slv_out_type;
            rx_i	 : in std_logic;
            tx_o	 : out std_logic;
            irq_on	 : out std_logic
        );
    end component can_vhdl_top;

	component wb_led is
	generic(
		memaddr		:	generic_addr_type;-- := CFG_BADR_LED;
		addrmask	:	generic_mask_type-- := CFG_MADR_LED;
	);
	port(
		clk		: in  std_logic;
		rst		: in  std_logic;
		led		: out  std_logic_vector(7 downto 0);
		wslvi	:	in	wb_slv_in_type;
		wslvo	:	out	wb_slv_out_type
	);
	end component;

	component wb_switches is
	generic(
		memaddr		:	generic_addr_type; --:= CFG_BADR_SW;
		addrmask	:	generic_mask_type --:= CFG_MADR_SW;
	);
	port(
		clk		: in  std_logic;
		rst		: in  std_logic;
		wslvi	:	in	wb_slv_in_type;
		wslvo	:	out	wb_slv_out_type;

        buttons : in std_logic_vector(4 downto 0);
        switches : in std_logic_vector(15 downto 0);

        interrupt : out std_logic
	);
	end component;

	component wb_timer is
		generic(
			memaddr		:	generic_addr_type; --:= CFG_BADR_TIMER;
			addrmask	:	generic_mask_type --:= CFG_MADR_TIMER;
		);
		port(
			clk		: in  std_logic;
			rst		: in  std_logic;
			wslvi	:	in	wb_slv_in_type;
			wslvo	:	out	wb_slv_out_type;

			interrupt : out std_logic
		);
	end component;

    component wb_scrolling is
        generic(
            memaddr		:	generic_addr_type; --:= CFG_BADR_SCR;
            addrmask	:	generic_mask_type --:= CFG_MADR_SCR;
        );
        port(
            clk		: in  std_logic;
            rst		: in  std_logic;
            wslvi	:	in	wb_slv_in_type;
            wslvo	:	out	wb_slv_out_type;
    
            anodes : out std_logic_vector(7 downto 0);
            cathodes : out std_logic_vector(7 downto 0)
        );
    end component;

end lt16soc_peripherals;

package body lt16soc_peripherals is

	--insert function bodies

end lt16soc_peripherals;