library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity scrolling_controller is
    port(
        clk : in std_logic;
        rst : in std_logic;
        on_off : in std_logic;
        cnt_start : out std_logic;
        cnt_done : in std_logic;
        next_char : out std_logic;
        hex_char : in std_logic_vector(4 downto 0);
        seg_data : out std_logic_vector(3 downto 0);
        seg_off : out std_logic;
        seg_shift : out std_logic;
        seg_write : out std_logic;
        seg_clear : out std_logic;
        buffer_elements : in std_logic_vector(4 downto 0)
    );
end entity scrolling_controller;

architecture Behavioral of scrolling_controller is

    type state_type is (s_off, s_wait, s_update);
    signal state : state_type;
    
    signal sig_seg_data_in : std_logic;
    signal sig_seg_shift : std_logic;
    signal sig_seg_write : std_logic;
    signal sig_seg_clear : std_logic;
    
    signal shift_state : integer range 1 to 16;

begin

	process(clk)
	begin
		if clk'event and clk='1' then
			if rst = '1' then
                state <= s_off;
                cnt_start <= '0';
                next_char <= '0';

                sig_seg_data_in <= '0';
                sig_seg_shift <= '0';
                sig_seg_write <= '0';
                sig_seg_clear <= '0';
            else
                sig_seg_data_in <= '0';

                case state is
                    when s_off =>
                        if on_off = '0' then
                            state <= s_off;
                            sig_seg_shift <= '0';
                            sig_seg_write <= '0';
                            sig_seg_clear <= '0';
                            cnt_start <= '0';
                            next_char <= '0';
                        else
                            state <= s_update;
                            sig_seg_data_in <= '1';
                            sig_seg_shift <= '1';
                            sig_seg_write <= '1';
                            sig_seg_clear <= '0';
                            cnt_start <= '1';
                            next_char <= '1';
                        end if;
                    when s_wait =>
                        if on_off = '1' then
                            state <= s_off;
                            sig_seg_clear <= '1';
                            cnt_start <= '0';
                            next_char <= '0';
                        elsif cnt_done = '0' then
                            state <= s_wait;
                            sig_seg_shift <= '0';
                            sig_seg_write <= '0';
                            sig_seg_clear <= '0';
                            cnt_start <= '0';
                            next_char <= '0';
                        else -- cnt_done = '1'
                            state <= s_update;
                            sig_seg_shift <= '0';
                            sig_seg_write <= '0';
                            sig_seg_clear <= '0';
                            cnt_start <= '1';
                            next_char <= '1';
                        end if;
                    when s_update =>
                        if on_off = '0' then
                            state <= s_wait;
                            sig_seg_data_in <= '1';
                            sig_seg_shift <= '1';
                            sig_seg_write <= '1';
                            sig_seg_clear <= '0';
                            cnt_start <= '0';
                            next_char <= '0';
                        else
                            state <= s_off;
                            sig_seg_clear <= '1';
                            cnt_start <= '0';
                            next_char <= '0';
                        end if;
                end case;
            end if;
		end if;
	end process;
	
    process(clk)
    begin
        if clk'event and clk='1' then
            if rst = '1' then
                seg_data <= (others => '0');
                seg_off <= '0';
                seg_shift <= '0';
                seg_write <= '0';
                seg_clear <= '1';
                shift_state <= 16;
            else
                seg_write <= '0';
            
                if sig_seg_data_in = '1' and shift_state <= unsigned(buffer_elements) then
                    seg_write <= sig_seg_write;
                end if;
                
                if sig_seg_shift = '1' then
                    if shift_state = 16 then
                        shift_state <= 1;
                    else
                        shift_state <= shift_state + 1;
                    end if;
                end if;
                
                seg_data <= hex_char(3 downto 0);
                seg_off <= hex_char(4);
                seg_shift <= sig_seg_shift;
                seg_clear <= sig_seg_clear;
            end if;
        end if;
    end process;

end Behavioral;