Set up testbench with 2 SOCs that communicate with CAN

This commit is contained in:
2022-12-11 13:36:13 +01:00
parent 7af2c51d61
commit fb051ccca4
8 changed files with 517 additions and 37 deletions

View File

@@ -20,15 +20,11 @@ can_interrupt:
.align
led_addr: .word 0x000F0000
timer_counter_addr: .word 0x000F0008
timer_status_addr: .word 0x000F000C
switches_addr: .word 0x000F0004
dmem_start_addr: .word 0x00000400
dmem_end_addr: .word 0x000004FC
priority_mask: .word 0xFFFFFF03
// timer_target_value: .word 127 // for simulation
timer_target_value: .word 0xF10000 // for real board
main:
// Initialize stack pointer to the end of the data memory
ldr r12, >dmem_end_addr
@@ -37,29 +33,22 @@ main:
ldr r0, >priority_mask
and r14, r0, r14
ldr r0,>led_addr // LED addr
ldr r1,>timer_status_addr // Timer addr
ldr r3,>timer_counter_addr // Timer addr
// Set LED to pattern
clr r2
addi r2, 0x7A
st08 r0, r2
// Enable the timer...
ldr r2, >timer_target_value
st32 r3, r2
clr r2
addi r2, 0x1 // enable bit set
st32 r1, r2
ldr r0, >led_addr
ldr r1, >switches_addr
loop:
br >loop
nop
timer_interrupt_handler:
switches_interrupt_handler:
ld32 r2, r1
// Set LED to pattern
clr r2
addi r2, 0x0C
st08 r0, r2
reti
nop
can_interrupt_handler:
reti
nop