diff --git a/soc/peripheral/scrolling_buffer.vhd b/soc/peripheral/scrolling_buffer.vhd
index eb58192..bf0b5d7 100644
--- a/soc/peripheral/scrolling_buffer.vhd
+++ b/soc/peripheral/scrolling_buffer.vhd
@@ -10,7 +10,8 @@ entity scrolling_buffer is
         buffer_write : in std_logic;
         buffer_data : in std_logic_vector(4 downto 0);
         next_char : in std_logic;
-        hex_char : out std_logic_vector(4 downto 0)
+        hex_char : out std_logic_vector(4 downto 0);
+        elements : out std_logic_vector(4 downto 0)
     );
 end entity scrolling_buffer;
 
@@ -34,12 +35,14 @@ begin
                 ptr_last <= -1;
                 ptr_write <= 0;
                 ring_buffer <= (others => (others => '0'));
+                elements <= (others => '0');
             else
                 if buffer_write = '1' then
                     ring_buffer(ptr_write) <= buffer_data;
                     
                     if ptr_last /= BUFFER_SIZE - 1 then
                         ptr_last <= ptr_write;
+                        elements <= std_logic_vector(to_unsigned(ptr_write + 1, 5));
                     end if;
 
                     if ptr_write = BUFFER_SIZE - 1 then
diff --git a/soc/peripheral/scrolling_controller.vhd b/soc/peripheral/scrolling_controller.vhd
index 81b8011..dc33958 100644
--- a/soc/peripheral/scrolling_controller.vhd
+++ b/soc/peripheral/scrolling_controller.vhd
@@ -15,7 +15,8 @@ entity scrolling_controller is
         seg_off : out std_logic;
         seg_shift : out std_logic;
         seg_write : out std_logic;
-        seg_clear : out std_logic
+        seg_clear : out std_logic;
+        buffer_elements : in std_logic_vector(4 downto 0)
     );
 end entity scrolling_controller;
 
@@ -28,6 +29,8 @@ architecture Behavioral of scrolling_controller is
     signal sig_seg_shift : std_logic;
     signal sig_seg_write : std_logic;
     signal sig_seg_clear : std_logic;
+    
+    signal shift_state : integer range 1 to 16;
 
 begin
 
@@ -77,7 +80,7 @@ begin
                             sig_seg_clear <= '0';
                             cnt_start <= '0';
                             next_char <= '0';
-                        else -- cnt_cone = '1'
+                        else -- cnt_done = '1'
                             state <= s_update;
                             sig_seg_shift <= '0';
                             sig_seg_write <= '0';
@@ -114,14 +117,25 @@ begin
                 seg_shift <= '0';
                 seg_write <= '0';
                 seg_clear <= '1';
+                shift_state <= 16;
             else
-                if sig_seg_data_in = '1' then
-                    seg_data <= hex_char(3 downto 0);
-                    seg_off <= hex_char(4);
+                seg_write <= '0';
+            
+                if sig_seg_data_in = '1' and shift_state <= unsigned(buffer_elements) then
+                    seg_write <= sig_seg_write;
                 end if;
-
+                
+                if sig_seg_shift = '1' then
+                    if shift_state = 16 then
+                        shift_state <= 1;
+                    else
+                        shift_state <= shift_state + 1;
+                    end if;
+                end if;
+                
+                seg_data <= hex_char(3 downto 0);
+                seg_off <= hex_char(4);
                 seg_shift <= sig_seg_shift;
-                seg_write <= sig_seg_write;
                 seg_clear <= sig_seg_clear;
             end if;
         end if;
diff --git a/soc/peripheral/scrolling_top.vhd b/soc/peripheral/scrolling_top.vhd
index 38befbb..1cc6d9a 100644
--- a/soc/peripheral/scrolling_top.vhd
+++ b/soc/peripheral/scrolling_top.vhd
@@ -32,6 +32,7 @@ architecture Behavioral of wb_scrolling is
     signal buffer_clear : std_logic;
     signal buffer_write : std_logic;
     signal buffer_data : std_logic_vector(4 downto 0);
+    signal buffer_elements : std_logic_vector(4 downto 0);
 
     signal seg_data : std_logic_vector(3 downto 0);
     signal seg_off : std_logic;
@@ -68,7 +69,8 @@ architecture Behavioral of wb_scrolling is
         buffer_write : in std_logic;
         buffer_data : in std_logic_vector(4 downto 0);
         next_char : in std_logic;
-        hex_char : out std_logic_vector(4 downto 0)
+        hex_char : out std_logic_vector(4 downto 0);
+        elements : out std_logic_vector(4 downto 0)
     );
     end component;
 
@@ -85,7 +87,8 @@ architecture Behavioral of wb_scrolling is
         seg_off : out std_logic;
         seg_shift : out std_logic;
         seg_write : out std_logic;
-        seg_clear : out std_logic
+        seg_clear : out std_logic;
+        buffer_elements : in std_logic_vector(4 downto 0)
     );
     end component;
 
@@ -122,7 +125,8 @@ begin
         buffer_write => buffer_write,
         buffer_data => buffer_data,
         next_char => next_char,
-        hex_char => hex_char
+        hex_char => hex_char,
+        elements => buffer_elements
     );
 
     controller: scrolling_controller
@@ -138,7 +142,8 @@ begin
         seg_off => seg_off,
         seg_shift => seg_shift,
         seg_write => seg_write,
-        seg_clear => seg_clear
+        seg_clear => seg_clear,
+        buffer_elements => buffer_elements
     );
 
     seven_segment: seven_segment_display
diff --git a/soc/testbench/scrolling_top_tb.vhd b/soc/testbench/scrolling_top_tb.vhd
index c779d60..129d17a 100644
--- a/soc/testbench/scrolling_top_tb.vhd
+++ b/soc/testbench/scrolling_top_tb.vhd
@@ -66,7 +66,7 @@ BEGIN
         data(24) <= '1'; -- buffer_write
         data(20 downto 16) <= '0' & x"D"; -- buffer_data
         data(8) <= '0'; -- buffer_clear
-        data(0) <= '1'; -- on_off
+        data(0) <= '0'; -- on_off
 		generate_sync_wb_single_write(slvi,slvo,clk,data);
 		wait for CLK_PERIOD;
 		
@@ -94,6 +94,14 @@ BEGIN
 		generate_sync_wb_single_write(slvi,slvo,clk,data);
 		wait for CLK_PERIOD;
 		
+        data <= (others => '0');
+        data(0) <= '1'; -- on_off
+		generate_sync_wb_single_write(slvi,slvo,clk,data);
+		wait for CLK_PERIOD;
+		data <= (others => '0');
+        data(0) <= '0'; -- on_off
+		generate_sync_wb_single_write(slvi,slvo,clk,data);
+		
 		wait for 100 us;
 		
         data <= (others => '0');
@@ -128,6 +136,72 @@ BEGIN
 		generate_sync_wb_single_write(slvi,slvo,clk,data);
 		wait for CLK_PERIOD;
 		
+        wait for 100 us;
+        
+        data <= (others => '0');
+        data(24) <= '1'; -- buffer_write
+        data(20 downto 16) <= '0' & x"B"; -- buffer_data
+        data(8) <= '0'; -- buffer_clear
+        data(0) <= '0'; -- on_off
+		generate_sync_wb_single_write(slvi,slvo,clk,data);
+		wait for CLK_PERIOD;
+		
+        data <= (others => '0');
+        data(24) <= '1'; -- buffer_write
+        data(20 downto 16) <= '0' & x"A"; -- buffer_data
+        data(8) <= '0'; -- buffer_clear
+        data(0) <= '0'; -- on_off
+		generate_sync_wb_single_write(slvi,slvo,clk,data);
+		wait for CLK_PERIOD;
+				
+        data <= (others => '0');
+        data(24) <= '1'; -- buffer_write
+        data(20 downto 16) <= '0' & x"D"; -- buffer_data
+        data(8) <= '0'; -- buffer_clear
+        data(0) <= '0'; -- on_off
+		generate_sync_wb_single_write(slvi,slvo,clk,data);
+		wait for CLK_PERIOD;
+		
+        data <= (others => '0');
+        data(24) <= '1'; -- buffer_write
+        data(20 downto 16) <= '1' & x"0"; -- buffer_data
+        data(8) <= '0'; -- buffer_clear
+        data(0) <= '0'; -- on_off
+		generate_sync_wb_single_write(slvi,slvo,clk,data);
+		wait for CLK_PERIOD;
+		
+        data <= (others => '0');
+        data(24) <= '1'; -- buffer_write
+        data(20 downto 16) <= '0' & x"C"; -- buffer_data
+        data(8) <= '0'; -- buffer_clear
+        data(0) <= '0'; -- on_off
+		generate_sync_wb_single_write(slvi,slvo,clk,data);
+		wait for CLK_PERIOD;
+		
+        data <= (others => '0');
+        data(24) <= '1'; -- buffer_write
+        data(20 downto 16) <= '0' & x"A"; -- buffer_data
+        data(8) <= '0'; -- buffer_clear
+        data(0) <= '0'; -- on_off
+		generate_sync_wb_single_write(slvi,slvo,clk,data);
+		wait for CLK_PERIOD;
+				
+        data <= (others => '0');
+        data(24) <= '1'; -- buffer_write
+        data(20 downto 16) <= '0' & x"F"; -- buffer_data
+        data(8) <= '0'; -- buffer_clear
+        data(0) <= '0'; -- on_off
+		generate_sync_wb_single_write(slvi,slvo,clk,data);
+		wait for CLK_PERIOD;
+		
+        data <= (others => '0');
+        data(24) <= '1'; -- buffer_write
+        data(20 downto 16) <= '0' & x"E"; -- buffer_data
+        data(8) <= '0'; -- buffer_clear
+        data(0) <= '0'; -- on_off
+		generate_sync_wb_single_write(slvi,slvo,clk,data);
+		wait for CLK_PERIOD;
+		
         wait for 100 us;
 
 		assert false report "Simulation terminated!" severity failure;