<?xml version="1.0" encoding="UTF-8"?>
<wave_config>
   <wave_state>
   </wave_state>
   <db_ref_list>
      <db_ref path="C:/msys/1.0/home/Ben/hiwi/esysoc/core_tb_isim_beh.wdb" id="1" type="auto">
         <top_modules>
            <top_module name="core_tb" />
            <top_module name="lt16x32_global" />
            <top_module name="lt16x32_internal" />
            <top_module name="numeric_std" />
            <top_module name="std_logic_1164" />
            <top_module name="textio" />
         </top_modules>
      </db_ref>
   </db_ref_list>
   <WVObjectSize size="6" />
   <wvobject fp_name="/core_tb/clk" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">clk</obj_property>
      <obj_property name="ObjectShortName">clk</obj_property>
   </wvobject>
   <wvobject fp_name="/core_tb/rst" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">rst</obj_property>
      <obj_property name="ObjectShortName">rst</obj_property>
   </wvobject>
   <wvobject fp_name="/core_tb/out_byte" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">out_byte[7:0]</obj_property>
      <obj_property name="ObjectShortName">out_byte[7:0]</obj_property>
   </wvobject>
   <wvobject fp_name="group35" type="group">
      <obj_property name="label">D mem</obj_property>
      <obj_property name="DisplayName">label</obj_property>
      <wvobject fp_name="/core_tb/dmem_proc_signal" type="array" db_ref_id="1">
         <obj_property name="ElementShortName">dmem_proc_signal</obj_property>
         <obj_property name="ObjectShortName">dmem_proc_signal</obj_property>
         <wvobject fp_name="/core_tb/dmem_proc_signal.read_data" type="array" db_ref_id="1">
            <obj_property name="ElementShortName">.read_data</obj_property>
            <obj_property name="ObjectShortName">dmem_proc_signal.read_data</obj_property>
            <obj_property name="Radix">HEXRADIX</obj_property>
         </wvobject>
         <wvobject fp_name="/core_tb/dmem_proc_signal.ready" type="logic" db_ref_id="1">
            <obj_property name="ElementShortName">.ready</obj_property>
            <obj_property name="ObjectShortName">dmem_proc_signal.ready</obj_property>
         </wvobject>
      </wvobject>
      <wvobject fp_name="/core_tb/proc_dmem_signal" type="array" db_ref_id="1">
         <obj_property name="ElementShortName">proc_dmem_signal</obj_property>
         <obj_property name="ObjectShortName">proc_dmem_signal</obj_property>
         <wvobject fp_name="/core_tb/proc_dmem_signal.write_data" type="array" db_ref_id="1">
            <obj_property name="ElementShortName">.write_data</obj_property>
            <obj_property name="ObjectShortName">proc_dmem_signal.write_data</obj_property>
            <obj_property name="Radix">HEXRADIX</obj_property>
         </wvobject>
         <wvobject fp_name="/core_tb/proc_dmem_signal.write_addr" type="array" db_ref_id="1">
            <obj_property name="ElementShortName">.write_addr</obj_property>
            <obj_property name="ObjectShortName">proc_dmem_signal.write_addr</obj_property>
            <obj_property name="Radix">HEXRADIX</obj_property>
         </wvobject>
         <wvobject fp_name="/core_tb/proc_dmem_signal.write_size" type="array" db_ref_id="1">
            <obj_property name="ElementShortName">.write_size</obj_property>
            <obj_property name="ObjectShortName">proc_dmem_signal.write_size</obj_property>
         </wvobject>
         <wvobject fp_name="/core_tb/proc_dmem_signal.write_en" type="logic" db_ref_id="1">
            <obj_property name="ElementShortName">.write_en</obj_property>
            <obj_property name="ObjectShortName">proc_dmem_signal.write_en</obj_property>
         </wvobject>
         <wvobject fp_name="/core_tb/proc_dmem_signal.read_addr" type="array" db_ref_id="1">
            <obj_property name="ElementShortName">.read_addr</obj_property>
            <obj_property name="ObjectShortName">proc_dmem_signal.read_addr</obj_property>
            <obj_property name="Radix">HEXRADIX</obj_property>
         </wvobject>
         <wvobject fp_name="/core_tb/proc_dmem_signal.read_size" type="array" db_ref_id="1">
            <obj_property name="ElementShortName">.read_size</obj_property>
            <obj_property name="ObjectShortName">proc_dmem_signal.read_size</obj_property>
         </wvobject>
         <wvobject fp_name="/core_tb/proc_dmem_signal.read_en" type="logic" db_ref_id="1">
            <obj_property name="ElementShortName">.read_en</obj_property>
            <obj_property name="ObjectShortName">proc_dmem_signal.read_en</obj_property>
         </wvobject>
      </wvobject>
   </wvobject>
   <wvobject fp_name="group34" type="group">
      <obj_property name="label">I mem</obj_property>
      <obj_property name="DisplayName">label</obj_property>
      <wvobject fp_name="/core_tb/imem_proc_signal" type="array" db_ref_id="1">
         <obj_property name="ElementShortName">imem_proc_signal</obj_property>
         <obj_property name="ObjectShortName">imem_proc_signal</obj_property>
         <wvobject fp_name="/core_tb/imem_proc_signal.read_data" type="array" db_ref_id="1">
            <obj_property name="ElementShortName">.read_data</obj_property>
            <obj_property name="ObjectShortName">imem_proc_signal.read_data</obj_property>
            <obj_property name="Radix">HEXRADIX</obj_property>
         </wvobject>
         <wvobject fp_name="/core_tb/imem_proc_signal.ready" type="logic" db_ref_id="1">
            <obj_property name="ElementShortName">.ready</obj_property>
            <obj_property name="ObjectShortName">imem_proc_signal.ready</obj_property>
         </wvobject>
      </wvobject>
      <wvobject fp_name="/core_tb/proc_imem_signal" type="array" db_ref_id="1">
         <obj_property name="ElementShortName">proc_imem_signal</obj_property>
         <obj_property name="ObjectShortName">proc_imem_signal</obj_property>
         <wvobject fp_name="/core_tb/proc_imem_signal.read_addr" type="array" db_ref_id="1">
            <obj_property name="ElementShortName">.read_addr</obj_property>
            <obj_property name="ObjectShortName">proc_imem_signal.read_addr</obj_property>
            <obj_property name="Radix">HEXRADIX</obj_property>
         </wvobject>
         <wvobject fp_name="/core_tb/proc_imem_signal.read_en" type="logic" db_ref_id="1">
            <obj_property name="ElementShortName">.read_en</obj_property>
            <obj_property name="ObjectShortName">proc_imem_signal.read_en</obj_property>
         </wvobject>
      </wvobject>
   </wvobject>
   <wvobject fp_name="group33" type="group">
      <obj_property name="label">IRQ</obj_property>
      <obj_property name="DisplayName">label</obj_property>
      <wvobject fp_name="/core_tb/irq_proc_signal" type="array" db_ref_id="1">
         <obj_property name="ElementShortName">irq_proc_signal</obj_property>
         <obj_property name="ObjectShortName">irq_proc_signal</obj_property>
      </wvobject>
      <wvobject fp_name="/core_tb/proc_irq_signal" type="array" db_ref_id="1">
         <obj_property name="ElementShortName">proc_irq_signal</obj_property>
         <obj_property name="ObjectShortName">proc_irq_signal</obj_property>
      </wvobject>
      <wvobject fp_name="/core_tb/irq_lines" type="array" db_ref_id="1">
         <obj_property name="ElementShortName">irq_lines[15:0]</obj_property>
         <obj_property name="ObjectShortName">irq_lines[15:0]</obj_property>
      </wvobject>
   </wvobject>
</wave_config>
