8e2c9e64b3
Re-upload of https://gem5-review.googlesource.com/c/public/gem5/+/41214 This provides a layer of indirection where the rounding mode setting/getting code will do nothing if fenv.h isn't available. At build time, if fenv.h can't be found, a warning is printed. Also, the include for fenv.h was guarded in the includes in the ISA header, but the functions from it weren't guarded in the actual code. Finally, the code was setting the rounding mode, but not setting it back. That would mean running these instructions would set the rounding mode in gem5 as a whole, affecting its other behaviors and any other instructions that might expect the default rounding mode. Change-Id: I3ff2b97189487579554aae890e14889bd63461d2 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44085 Reviewed-by: Gabe Black <gabe.black@gmail.com> Maintainer: Gabe Black <gabe.black@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
122 lines
4.1 KiB
C++
122 lines
4.1 KiB
C++
// -*- mode:c++ -*-
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// Copyright (c) 2010, 2012, 2017-2018, 2020 ARM Limited
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// All rights reserved
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//
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// The license below extends only to copyright in the software and shall
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// not be construed as granting a license to any other intellectual
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// property including but not limited to intellectual property relating
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// to a hardware implementation of the functionality of the software
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// licensed hereunder. You may use the software subject to the license
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// terms below provided that you ensure that this notice is replicated
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// unmodified and in its entirety in all distributions of the software,
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// modified or unmodified, in source code or in binary form.
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//
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// Copyright (c) 2007-2008 The Florida State University
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met: redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer;
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// redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution;
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// neither the name of the copyright holders nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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////////////////////////////////////////////////////////////////////
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//
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// Output include file directives.
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//
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output header {{
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#include <iostream>
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#include <sstream>
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#include "arch/arm/insts/branch.hh"
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#include "arch/arm/insts/branch64.hh"
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#include "arch/arm/insts/crypto.hh"
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#include "arch/arm/insts/data64.hh"
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#include "arch/arm/insts/fplib.hh"
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#include "arch/arm/insts/macromem.hh"
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#include "arch/arm/insts/mem.hh"
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#include "arch/arm/insts/mem64.hh"
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#include "arch/arm/insts/misc.hh"
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#include "arch/arm/insts/misc64.hh"
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#include "arch/arm/insts/mult.hh"
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#include "arch/arm/insts/neon64_mem.hh"
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#include "arch/arm/insts/pred_inst.hh"
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#include "arch/arm/insts/pseudo.hh"
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#include "arch/arm/insts/static_inst.hh"
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#include "arch/arm/insts/sve.hh"
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#include "arch/arm/insts/sve_mem.hh"
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#include "arch/arm/insts/tme64.hh"
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#include "arch/arm/insts/vfp.hh"
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#include "enums/DecoderFlavor.hh"
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#include "mem/packet.hh"
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#include "sim/faults.hh"
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namespace ArmISAInst
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{
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using namespace ArmISA;
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}
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}};
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output decoder {{
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#include <string>
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#include <gem5/asm/generic/m5ops.h>
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#include "arch/arm/decoder.hh"
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#include "arch/arm/faults.hh"
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#include "arch/arm/insts/sve_macromem.hh"
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#include "arch/arm/regs/int.hh"
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#include "arch/arm/utility.hh"
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#include "base/cprintf.hh"
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#include "base/loader/symtab.hh"
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#include "cpu/thread_context.hh"
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using namespace ArmISA;
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}};
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output exec {{
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#include <cmath>
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#include "arch/arm/faults.hh"
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#include "arch/arm/interrupts.hh"
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#include "arch/arm/isa.hh"
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#include "arch/arm/htm.hh"
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#include "arch/arm/pauth_helpers.hh"
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#include "arch/arm/reg_abi.hh"
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#include "arch/arm/semihosting.hh"
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#include "arch/arm/utility.hh"
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#include "arch/generic/memhelpers.hh"
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#include "base/condcodes.hh"
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#include "base/crc.hh"
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#include "base/fenv.hh"
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#include "cpu/base.hh"
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#include "debug/Arm.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/pseudo_inst.hh"
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#include "sim/sim_exit.hh"
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using namespace ArmISA;
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}};
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