Mitch Hayenga fafa83ed32 cpu: Add per-thread monitors ...

Adds per-thread address monitors to support FullSystem SMT.

2015-09-30 11:14:19 -05:00

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arch

sparc: writing to tick_cmpr should not cause a panic

2015-09-15 08:14:07 -05:00

base

base: Rewrite the CircleBuf to fix bugs and add serialization

2015-08-07 09:59:19 +01:00

cpu

cpu: Add per-thread monitors

2015-09-30 11:14:19 -05:00

dev

arch, x86: Delete packet in IntDevice::recvResponse

2015-09-29 09:28:26 -05:00

doc

cpu: `Minor' in-order CPU model

2014-07-23 16:09:04 -05:00

doxygen

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kern

style: change Process function calls to use camelCase

2015-07-24 12:25:23 -07:00

mem

ruby: Fix CacheMemory allocate leak

2015-09-29 09:28:26 -05:00

proto

cpu: add support for outputing a protobuf formatted CPU trace

2015-02-16 03:32:38 -05:00

python

ruby: Expose MessageBuffers as SimObjects

2015-08-14 00:19:44 -05:00

sim

cpu: Change thread assignments for heterogenous SMT

2015-09-30 11:14:19 -05:00

unittest

base: Rewrite the CircleBuf to fix bugs and add serialization

2015-08-07 09:59:19 +01:00

Doxyfile

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SConscript

sim: tag-based checkpoint versioning

2015-09-02 15:23:30 -05:00