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fa763d2ecfae16e84a9f9d689d19f746d84d08e3
gem5/arch
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Gabe Black fa763d2ecf Merge m5.eecs.umich.edu:/bk/newmem
into  ewok.(none):/home/gblack/m5/newmem

cpu/cpu_exec_context.cc:
    Hand merge

--HG--
rename : arch/alpha/registerfile.hh => arch/alpha/regfile.hh
extra : convert_revision : bd18966f7c37c67c2bc7ca2633b58f70ce64409c
2006-03-14 16:08:32 -05:00
..
alpha
Merge m5.eecs.umich.edu:/bk/newmem
2006-03-14 16:08:32 -05:00
mips
Clean up arch/*/process.hh includes and std namespace issues.
2006-03-12 16:27:52 -05:00
sparc
Added the sparc regfile.hh to bitkeeper
2006-03-14 16:01:21 -05:00
isa_parser.py
Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt.
2006-03-14 15:55:00 -05:00
isa_specific.hh
Auto-generate arch/foo.hh "switch headers" in scons.
2006-02-22 22:22:06 -05:00
SConscript
Moved registerfile.hh to regfile.hh
2006-03-14 16:05:44 -05:00
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