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Timothy Hayes f9b4e32c33 arch-arm: Transactional Memory Extension (TME) 
This patch extends the generic hardware transactional memory support in
Ruby and the O3/TimingSimpleCPU cores with the Arm-specific hardware
transactional memory architectural extensions (TME).

JIRA: https://gem5.atlassian.net/browse/GEM5-588

Change-Id: I8c663da977ed3e8c94635fcb11834bd001e92054
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30329
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2020-09-08 23:37:40 +00:00
..
arch
arch-arm: Transactional Memory Extension (TME)
2020-09-08 23:37:40 +00:00
base
base: Tag API methods in crc.hh
2020-09-08 16:32:38 +00:00
cpu
cpu: convert trace cpu to new style stats
2020-09-08 20:47:01 +00:00
dev
dev,arm: Use the ArmSystem::PageBytes constant in the generic timer.
2020-09-08 22:05:55 +00:00
doc
misc: Removed unneeded Doxygen pages
2020-04-25 01:08:38 +00:00
doxygen
base,misc: Add group definitions for newly tagged API in src/base
2020-09-08 22:29:43 +00:00
gpu-compute
misc: Use VPtr in hsa_driver.cc
2020-08-31 17:44:11 +00:00
kern
misc: Clean up usage of arch/isa_traits.hh.
2020-08-28 07:20:58 +00:00
learning_gem5
learning-gem5: convert simple cache to new style stats
2020-09-05 01:51:30 +00:00
mem
mem-ruby: Check number of vnets when creating links
2020-09-08 22:09:23 +00:00
proto
misc: Use the protobuf version to choose between ByteSize(Long).
2020-04-29 21:46:11 +00:00
python
base, sim: Make ByteOrder into a ScopedEnum accessible to Python
2020-09-08 16:24:00 +00:00
sim
base, sim: Make ByteOrder into a ScopedEnum accessible to Python
2020-09-08 16:24:00 +00:00
systemc
systemc: Send response to TLM side if a packet does not need response
2020-08-27 00:15:26 +00:00
unittest
base: Make the Value stat's functor method accept lambdas.
2020-09-01 21:57:34 +00:00
Doxyfile
misc: Reverting version numbers
2020-07-03 20:59:44 -07:00
SConscript
scons: Simplify arch enum generation
2020-09-07 08:42:07 +00:00