f73b05431a
The Minor CPU currently doesn't drain properly when it is switched out. This happens because Fetch 1 expects to be in the FetchHalted state when it is drained. However, because the CPU is switched out, it is stuck in the FetchWaitingForPC state. Fix this by ignoring drain requests and returning DrainState::Drained from MinorCPU::drain() if the CPU is switched out. This is always safe since a switched out CPU, by definition, doesn't have any instructions in flight.
351 lines
9.0 KiB
C++
351 lines
9.0 KiB
C++
/*
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* Copyright (c) 2012-2014 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Andrew Bardsley
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*/
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#include "arch/utility.hh"
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#include "cpu/minor/cpu.hh"
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#include "cpu/minor/dyn_inst.hh"
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#include "cpu/minor/fetch1.hh"
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#include "cpu/minor/pipeline.hh"
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#include "debug/Drain.hh"
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#include "debug/MinorCPU.hh"
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#include "debug/Quiesce.hh"
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MinorCPU::MinorCPU(MinorCPUParams *params) :
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BaseCPU(params)
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{
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/* This is only written for one thread at the moment */
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Minor::MinorThread *thread;
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if (FullSystem) {
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thread = new Minor::MinorThread(this, 0, params->system, params->itb,
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params->dtb, params->isa[0]);
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} else {
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/* thread_id 0 */
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thread = new Minor::MinorThread(this, 0, params->system,
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params->workload[0], params->itb, params->dtb, params->isa[0]);
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}
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threads.push_back(thread);
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thread->setStatus(ThreadContext::Halted);
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ThreadContext *tc = thread->getTC();
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if (params->checker) {
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fatal("The Minor model doesn't support checking (yet)\n");
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}
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threadContexts.push_back(tc);
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Minor::MinorDynInst::init();
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pipeline = new Minor::Pipeline(*this, *params);
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activityRecorder = pipeline->getActivityRecorder();
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}
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MinorCPU::~MinorCPU()
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{
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delete pipeline;
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for (ThreadID thread_id = 0; thread_id < threads.size(); thread_id++) {
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delete threads[thread_id];
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}
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}
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void
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MinorCPU::init()
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{
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BaseCPU::init();
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if (!params()->switched_out &&
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system->getMemoryMode() != Enums::timing)
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{
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fatal("The Minor CPU requires the memory system to be in "
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"'timing' mode.\n");
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}
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/* Initialise the ThreadContext's memory proxies */
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for (ThreadID thread_id = 0; thread_id < threads.size(); thread_id++) {
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ThreadContext *tc = getContext(thread_id);
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tc->initMemProxies(tc);
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}
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/* Initialise CPUs (== threads in the ISA) */
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if (FullSystem && !params()->switched_out) {
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for (ThreadID thread_id = 0; thread_id < threads.size(); thread_id++)
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{
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ThreadContext *tc = getContext(thread_id);
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/* Initialize CPU, including PC */
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TheISA::initCPU(tc, cpuId());
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}
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}
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}
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/** Stats interface from SimObject (by way of BaseCPU) */
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void
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MinorCPU::regStats()
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{
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BaseCPU::regStats();
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stats.regStats(name(), *this);
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pipeline->regStats();
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}
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void
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MinorCPU::serializeThread(CheckpointOut &cp, ThreadID thread_id) const
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{
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threads[thread_id]->serialize(cp);
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}
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void
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MinorCPU::unserializeThread(CheckpointIn &cp, ThreadID thread_id)
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{
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if (thread_id != 0)
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fatal("Trying to load more than one thread into a MinorCPU\n");
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threads[thread_id]->unserialize(cp);
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}
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void
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MinorCPU::serialize(CheckpointOut &cp) const
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{
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pipeline->serialize(cp);
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BaseCPU::serialize(cp);
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}
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void
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MinorCPU::unserialize(CheckpointIn &cp)
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{
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pipeline->unserialize(cp);
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BaseCPU::unserialize(cp);
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}
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Addr
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MinorCPU::dbg_vtophys(Addr addr)
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{
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/* Note that this gives you the translation for thread 0 */
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panic("No implementation for vtophy\n");
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return 0;
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}
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void
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MinorCPU::wakeup()
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{
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DPRINTF(Drain, "MinorCPU wakeup\n");
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for (auto i = threads.begin(); i != threads.end(); i ++) {
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if ((*i)->status() == ThreadContext::Suspended)
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(*i)->activate();
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}
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DPRINTF(Drain,"Suspended Processor awoke\n");
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}
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void
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MinorCPU::startup()
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{
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DPRINTF(MinorCPU, "MinorCPU startup\n");
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BaseCPU::startup();
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for (auto i = threads.begin(); i != threads.end(); i ++)
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(*i)->startup();
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/* Workaround cases in SE mode where a thread is activated with an
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* incorrect PC that is updated after the call to activate. This
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* causes problems for Minor since it instantiates a virtual
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* branch instruction when activateContext() is called which ends
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* up pointing to an illegal address. */
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if (threads[0]->status() == ThreadContext::Active)
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activateContext(0);
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}
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DrainState
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MinorCPU::drain()
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{
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if (switchedOut()) {
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DPRINTF(Drain, "Minor CPU switched out, draining not needed.\n");
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return DrainState::Drained;
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}
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DPRINTF(Drain, "MinorCPU drain\n");
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/* Need to suspend all threads and wait for Execute to idle.
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* Tell Fetch1 not to fetch */
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if (pipeline->drain()) {
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DPRINTF(Drain, "MinorCPU drained\n");
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return DrainState::Drained;
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} else {
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DPRINTF(Drain, "MinorCPU not finished draining\n");
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return DrainState::Draining;
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}
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}
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void
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MinorCPU::signalDrainDone()
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{
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DPRINTF(Drain, "MinorCPU drain done\n");
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Drainable::signalDrainDone();
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}
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void
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MinorCPU::drainResume()
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{
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if (switchedOut()) {
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DPRINTF(Drain, "drainResume while switched out. Ignoring\n");
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return;
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}
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DPRINTF(Drain, "MinorCPU drainResume\n");
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if (!system->isTimingMode()) {
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fatal("The Minor CPU requires the memory system to be in "
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"'timing' mode.\n");
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}
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wakeup();
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pipeline->drainResume();
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}
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void
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MinorCPU::memWriteback()
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{
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DPRINTF(Drain, "MinorCPU memWriteback\n");
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}
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void
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MinorCPU::switchOut()
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{
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DPRINTF(MinorCPU, "MinorCPU switchOut\n");
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assert(!switchedOut());
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BaseCPU::switchOut();
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/* Check that the CPU is drained? */
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activityRecorder->reset();
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}
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void
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MinorCPU::takeOverFrom(BaseCPU *old_cpu)
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{
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DPRINTF(MinorCPU, "MinorCPU takeOverFrom\n");
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BaseCPU::takeOverFrom(old_cpu);
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/* Don't think I need to do anything here */
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}
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void
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MinorCPU::activateContext(ThreadID thread_id)
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{
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DPRINTF(MinorCPU, "ActivateContext thread: %d", thread_id);
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/* Do some cycle accounting. lastStopped is reset to stop the
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* wakeup call on the pipeline from adding the quiesce period
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* to BaseCPU::numCycles */
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stats.quiesceCycles += pipeline->cyclesSinceLastStopped();
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pipeline->resetLastStopped();
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/* Wake up the thread, wakeup the pipeline tick */
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threads[thread_id]->activate();
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wakeupOnEvent(Minor::Pipeline::CPUStageId);
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pipeline->wakeupFetch();
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}
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void
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MinorCPU::suspendContext(ThreadID thread_id)
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{
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DPRINTF(MinorCPU, "SuspendContext %d\n", thread_id);
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threads[thread_id]->suspend();
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}
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void
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MinorCPU::wakeupOnEvent(unsigned int stage_id)
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{
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DPRINTF(Quiesce, "Event wakeup from stage %d\n", stage_id);
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/* Mark that some activity has taken place and start the pipeline */
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activityRecorder->activateStage(stage_id);
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pipeline->start();
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}
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MinorCPU *
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MinorCPUParams::create()
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{
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numThreads = 1;
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if (!FullSystem && workload.size() != 1)
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panic("only one workload allowed");
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return new MinorCPU(this);
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}
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MasterPort &MinorCPU::getInstPort()
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{
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return pipeline->getInstPort();
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}
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MasterPort &MinorCPU::getDataPort()
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{
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return pipeline->getDataPort();
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}
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Counter
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MinorCPU::totalInsts() const
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{
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Counter ret = 0;
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for (auto i = threads.begin(); i != threads.end(); i ++)
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ret += (*i)->numInst;
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return ret;
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}
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Counter
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MinorCPU::totalOps() const
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{
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Counter ret = 0;
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for (auto i = threads.begin(); i != threads.end(); i ++)
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ret += (*i)->numOp;
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return ret;
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}
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