Ali Saidi f317227b4e hopefully the final hacky change to make the bus bridge work ok ...

cache blocks that get dmaed ARE NOT marked invalid in the caches so it's a performance issue here

src/mem/bridge.cc:
src/mem/bridge.hh:
    hopefully the final hacky change to make the bus bridge work ok

--HG--
extra : convert_revision : 62cbc65c74d1a84199f0a376546ec19994c5899c

2007-05-15 17:39:50 -04:00

..

boot

hopefully the final hacky change to make the bus bridge work ok

2007-05-15 17:39:50 -04:00

common

remove hit_latency and make latency do the right thing

2007-05-10 18:24:48 -04:00

example

Move all of the parameters of the Root SimObject so they are

2007-03-06 11:13:43 -08:00

splash2

Fix the splash2 run script

2007-04-23 16:03:53 -04:00