gem5/configs/example/arm/fs_power.py

# Copyright (c) 2017, 2020 ARM Limited
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# This configuration file extends the example ARM big.LITTLE(tm)
# with example power models.

from __future__ import print_function
from __future__ import absolute_import

import argparse
import os

import m5
from m5.objects import MathExprPowerModel, PowerModel

import fs_bigLITTLE as bL


class CpuPowerOn(MathExprPowerModel):
    def __init__(self, cpu_path, **kwargs):
        super(CpuPowerOn, self).__init__(**kwargs)
        # 2A per IPC, 3pA per cache miss
        # and then convert to Watt
        self.dyn =  "voltage * (2 * {}.ipc + 3 * 0.000000001 * " \
                    "{}.dcache.overall_misses / sim_seconds)".format(cpu_path,
                                                                     cpu_path)
        self.st = "4 * temp"

class CpuPowerOff(MathExprPowerModel):
    dyn = "0"
    st = "0"

class CpuPowerModel(PowerModel):
    def __init__(self, cpu_path, **kwargs):
        super(CpuPowerModel, self).__init__(**kwargs)
        self.pm = [
            CpuPowerOn(cpu_path), # ON
            CpuPowerOff(), # CLK_GATED
            CpuPowerOff(), # SRAM_RETENTION
            CpuPowerOff(), # OFF
        ]

class L2PowerOn(MathExprPowerModel):
    def __init__(self, l2_path, **kwargs):
        super(L2PowerOn, self).__init__(**kwargs)
        # Example to report l2 Cache overall_accesses
        # The estimated power is converted to Watt and will vary based
        # on the size of the cache
        self.dyn = "{}.overall_accesses * 0.000018000".format(l2_path)
        self.st = "(voltage * 3)/10"

class L2PowerOff(MathExprPowerModel):
    dyn = "0"
    st = "0"

class L2PowerModel(PowerModel):
    def __init__(self, l2_path, **kwargs):
        super(L2PowerModel, self).__init__(**kwargs)
        # Choose a power model for every power state
        self.pm = [
            L2PowerOn(l2_path), # ON
            L2PowerOff(), # CLK_GATED
            L2PowerOff(), # SRAM_RETENTION
            L2PowerOff(), # OFF
        ]


def main():
    parser = argparse.ArgumentParser(
        description="Generic ARM big.LITTLE configuration with "\
        "example power models")
    bL.addOptions(parser)
    options = parser.parse_args()

    if options.cpu_type != "timing":
        m5.fatal("The power example script requires 'timing' CPUs.")

    root = bL.build(options)

    # Wire up some example power models to the CPUs
    for cpu in root.system.descendants():
        if not isinstance(cpu, m5.objects.BaseCPU):
            continue

        cpu.power_state.default_state = "ON"
        cpu.power_model = CpuPowerModel(cpu.path())

    # Example power model for the L2 Cache of the bigCluster
    for l2 in root.system.bigCluster.l2.descendants():
        if not isinstance(l2, m5.objects.Cache):
            continue

        l2.power_state.default_state = "ON"
        l2.power_model = L2PowerModel(l2.path())

    bL.instantiate(options)

    print("*" * 70)
    print("WARNING: The power numbers generated by this script are "
        "examples. They are not representative of any particular "
        "implementation or process.")
    print("*" * 70)

    # Dumping stats periodically
    m5.stats.periodicStatDump(m5.ticks.fromSeconds(0.1E-3))
    bL.run()


if __name__ == "__m5_main__":
    main()