Files
gem5/src/arch/power/SConscript
Sandipan Das f019d9f866 arch-power: Add support for trapping user faults
This adds support for trapping into GDB when user-mode
faults such as those pertaining to alignment (SIGBUS),
traps (SIGTRAP) and unimplemented opcodes (SIGILL) are
encountered.

Change-Id: Ieb557abd4173b5acb4be6f0c30964aea1eba71a5
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47359
Reviewed-by: Boris Shingarov <shingarov@labware.com>
Maintainer: Boris Shingarov <shingarov@labware.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-04 18:19:56 +00:00

68 lines
2.6 KiB
Python

# -*- mode:python -*-
# Copyright (c) 2009 The University of Edinburgh
# Copyright (c) 2020 LabWare
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Import('*')
if env['TARGET_ISA'] == 'power':
# Workaround for bug in SCons version > 0.97d20071212
# Scons bug id: 2006 M5 Bug id: 308
Dir('isa/formats')
Source('decoder.cc')
Source('faults.cc')
Source('insts/branch.cc')
Source('insts/mem.cc')
Source('insts/integer.cc')
Source('insts/floating.cc')
Source('insts/condition.cc')
Source('insts/static_inst.cc')
Source('linux/linux.cc')
Source('linux/se_workload.cc')
Source('isa.cc')
Source('pagetable.cc')
Source('process.cc')
Source('remote_gdb.cc')
Source('se_workload.cc')
Source('tlb.cc')
SimObject('PowerInterrupts.py')
SimObject('PowerISA.py')
SimObject('PowerMMU.py')
SimObject('PowerSeWorkload.py')
SimObject('PowerTLB.py')
DebugFlag('Power')
ISADesc('isa/main.isa')
GdbXml('power-core.xml', 'gdb_xml_power_core')
GdbXml('power64-core.xml', 'gdb_xml_power64_core')
GdbXml('power-fpu.xml', 'gdb_xml_power_fpu')
GdbXml('powerpc-32.xml', 'gdb_xml_powerpc_32')
GdbXml('powerpc-64.xml', 'gdb_xml_powerpc_64')