49cb833ee6
This patch allows partial translation entries (intermediate PAs obtained from a table walk) to be stored in an ArmTLB. This effectively means reserving a fraction of the TLB entries to cache table walks JIRA: https://gem5.atlassian.net/browse/GEM5-1108 Change-Id: Id0efb7d75dd017366c4c3b74de7b57355a53a01a Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52124 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
62 lines
2.8 KiB
Python
62 lines
2.8 KiB
Python
# -*- mode:python -*-
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# Copyright (c) 2009, 2013, 2015, 2021 Arm Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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from m5.SimObject import SimObject
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from m5.params import *
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from m5.proxy import *
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from m5.objects.BaseTLB import BaseTLB
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class ArmLookupLevel(Enum):
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vals = [ "L0", "L1", "L2", "L3" ]
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class ArmTLB(BaseTLB):
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type = 'ArmTLB'
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cxx_class = 'gem5::ArmISA::TLB'
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cxx_header = "arch/arm/tlb.hh"
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sys = Param.System(Parent.any, "system object parameter")
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size = Param.Int(64, "TLB size")
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is_stage2 = Param.Bool(False, "Is this a stage 2 TLB?")
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partial_levels = VectorParam.ArmLookupLevel([],
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"List of intermediate lookup levels allowed to be cached in the TLB "
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"(=holding intermediate PAs obtained during a table walk")
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class ArmStage2TLB(ArmTLB):
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size = 32
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is_stage2 = True
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