Nilay Vaish ee06fed656 x86: change divide-by-zero fault to divide-error ...

Same exception is raised whether division with zero is performed or the
quotient is greater than the maximum value that the provided space can hold.
Divide-by-Zero is the AMD terminology, while Divide-Error is Intel's.

2015-04-29 22:35:22 -05:00

..

alpha

arch: Make readMiscRegNoEffect const throughout

2015-02-16 03:33:28 -05:00

arm

misc: Appease gcc 5.1 without moving GDB_REG_BYTES

2015-04-24 03:30:08 -04:00

generic

sim: Move the BaseTLB to src/arch/generic/

2015-02-11 10:23:27 -05:00

mips

arch: Make readMiscRegNoEffect const throughout

2015-02-16 03:33:28 -05:00

null

arch: Cleanup unused ISA traits constants

2014-09-03 07:42:21 -04:00

power

arch: Make readMiscRegNoEffect const throughout

2015-02-16 03:33:28 -05:00

sparc

arch: Make readMiscRegNoEffect const throughout

2015-02-16 03:33:28 -05:00

x86

x86: change divide-by-zero fault to divide-error

2015-04-29 22:35:22 -05:00

isa_parser.py

arch: Allow named constants as decode case values.

2014-12-04 15:52:48 -08:00

micro_asm_test.py

Add a second section to make sure the ROM is extended properly.

2007-05-31 22:21:21 +00:00

micro_asm.py

scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access

2009-09-22 15:24:16 -07:00

SConscript

kvm, x86: Adding support for SE mode execution

2014-11-23 18:01:08 -08:00