eba0ab506b
These are "common" in the sense that they're not in a particular test directory, but I think they're only used by one test. Change-Id: I4ffd209d04ed0e5253085810913827b87412b302 Reviewed-on: https://gem5-review.googlesource.com/11272 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
125 lines
4.0 KiB
C++
125 lines
4.0 KiB
C++
/*****************************************************************************
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Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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more contributor license agreements. See the NOTICE file distributed
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with this work for additional information regarding copyright ownership.
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Accellera licenses this file to you under the Apache License, Version 2.0
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(the "License"); you may not use this file except in compliance with the
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License. You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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implied. See the License for the specific language governing
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permissions and limitations under the License.
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*****************************************************************************/
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#ifndef __EXPLICIT_LT_TARGET_H__
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#define __EXPLICIT_LT_TARGET_H__
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#include "tlm.h"
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#include "tlm_utils/simple_target_socket.h"
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//#include <systemc>
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#include <cassert>
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#include <vector>
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#include <queue>
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//#include <iostream>
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class ExplicitLTTarget : public sc_core::sc_module
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{
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public:
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typedef tlm::tlm_generic_payload transaction_type;
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typedef tlm::tlm_phase phase_type;
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typedef tlm::tlm_sync_enum sync_enum_type;
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typedef tlm_utils::simple_target_socket<ExplicitLTTarget> target_socket_type;
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public:
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target_socket_type socket;
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public:
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SC_HAS_PROCESS(ExplicitLTTarget);
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ExplicitLTTarget(sc_core::sc_module_name name) :
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sc_core::sc_module(name),
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socket("socket")
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{
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// register nb_transport method
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socket.register_b_transport(this, &ExplicitLTTarget::myBTransport);
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socket.register_transport_dbg(this, &ExplicitLTTarget::transport_dbg);
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}
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void myBTransport(transaction_type& trans, sc_core::sc_time& t)
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{
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sc_dt::uint64 address = trans.get_address();
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assert(address < 400);
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unsigned int& data = *reinterpret_cast<unsigned int*>(trans.get_data_ptr());
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if (trans.get_command() == tlm::TLM_WRITE_COMMAND) {
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std::cout << name() << ": Received write request: A = 0x"
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<< std::hex << (unsigned int)address << ", D = 0x" << data
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<< std::dec << " @ " << sc_core::sc_time_stamp()
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<< std::endl;
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*reinterpret_cast<unsigned int*>(&mMem[address]) = data;
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// Synchronization on demand (eg need to assert an interrupt)
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// Wait for passed timing annotation + wait for an extra 50 ns
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wait(t + sc_core::sc_time(50, sc_core::SC_NS));
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t = sc_core::SC_ZERO_TIME;
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// We are synchronized, we can read/write sc_signals, wait,...
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*reinterpret_cast<unsigned int*>(trans.get_data_ptr()) =
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*reinterpret_cast<unsigned int*>(&mMem[address]);
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} else {
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std::cout << name() << ": Received read request: A = 0x"
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<< std::hex << (unsigned int)address
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<< std::dec << " @ " << sc_core::sc_time_stamp()
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<< std::endl;
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data = *reinterpret_cast<unsigned int*>(&mMem[address]);
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// Finish transaction (use timing annotation)
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t += sc_core::sc_time(100, sc_core::SC_NS);
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}
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trans.set_response_status(tlm::TLM_OK_RESPONSE);
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}
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unsigned int transport_dbg(transaction_type& r)
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{
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if (r.get_address() >= 400) return 0;
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unsigned int tmp = (int)r.get_address();
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unsigned int num_bytes;
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if (tmp + r.get_data_length() >= 400) {
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num_bytes = 400 - tmp;
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} else {
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num_bytes = r.get_data_length();
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}
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if (!r.is_read() && !r.is_write()) {
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return 0;
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}
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if (r.is_read()) {
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for (unsigned int i = 0; i < num_bytes; ++i) {
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r.get_data_ptr()[i] = mMem[i + tmp];
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}
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} else {
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for (unsigned int i = 0; i < num_bytes; ++i) {
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mMem[i + tmp] = r.get_data_ptr()[i];
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}
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}
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return num_bytes;
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}
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private:
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unsigned char mMem[400];
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};
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#endif
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