Tiago Mück 9232f76cf5 scons: change ARM default protocol to CHI ...

Change-Id: Ic05f96b84a4e61e93bc12e48381c6a809f260021
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42564
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>

2021-03-18 19:02:21 +00:00

..

ARM

scons: change ARM default protocol to CHI

2021-03-18 19:02:21 +00:00

ARM_MESI_Three_Level

arch-arm: Fixed issue building ARM_MESI_Three_Level

2020-05-23 01:24:41 +00:00

ARM_MESI_Three_Level_HTM

mem-ruby: HTM mem implementation

2020-09-08 09:13:30 +00:00

ARM_MOESI_hammer

arch-arm: Fixed spacing issue in ARM_MOESI_hammer

2020-05-23 01:24:41 +00:00

Garnet_standalone

misc: Update Garnet_standalone build opts

2020-05-17 22:33:05 +00:00

GCN3_X86

gpu-compute, mem-ruby, configs: Add GCN3 ISA support to GPU model

2020-06-15 22:45:17 +00:00

MIPS

scons: Do not build the InOrderCPU

2015-01-20 08:12:45 -05:00

NULL

build opts: add MI_example to NULL ISA

2014-09-01 16:55:46 -05:00

NULL_MESI_Two_Level

tests, ruby: Move rubytests from ALPHA (linux) to NULL (none)

2016-11-17 04:54:16 -05:00

NULL_MOESI_CMP_directory

tests, ruby: Move rubytests from ALPHA (linux) to NULL (none)

2016-11-17 04:54:16 -05:00

NULL_MOESI_CMP_token

tests, ruby: Move rubytests from ALPHA (linux) to NULL (none)

2016-11-17 04:54:16 -05:00

NULL_MOESI_hammer

tests, ruby: Move rubytests from ALPHA (linux) to NULL (none)

2016-11-17 04:54:16 -05:00

POWER

SE/FS: Pull FULL_SYSTEM out of the build_opts files

2012-01-28 07:24:53 -08:00

RISCV

riscv: [Patch 5/5] Added missing support for timing CPU models

2016-11-30 17:10:28 -05:00

SPARC

scons: Do not build the InOrderCPU

2015-01-20 08:12:45 -05:00

X86

SE/FS: Pull FULL_SYSTEM out of the build_opts files

2012-01-28 07:24:53 -08:00

X86_MESI_Two_Level

mem-ruby: Enable set size increase

2019-06-05 13:59:00 +00:00

X86_MOESI_AMD_Base

gpu-compute: AMD's baseline GPU model

2016-01-19 14:28:22 -05:00