f01d68bf96
This PR adds a RiscvDemoBoard that can be used with both SE and FS mode.This was tested using the workloads riscv-matrix-multiply-run for SE and riscv-ubuntu-20.04-boot for FS. Two example config scripts have also been added.
113 lines
3.5 KiB
Python
113 lines
3.5 KiB
Python
# Copyright (c) 2024 The Regents of the University of California
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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"""
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This script utilizes the RiscvDemoBoard to run a simple Ubunutu boot. The script
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will boot the the OS to login before exiting the simulation.
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A detailed terminal output can be found in `m5out/board.platform.terminal`.
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**Warning:** The RiscvDemoBoard uses the Timing CPU. The boot may take
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considerable time to complete execution.
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Usage
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-----
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```
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scons build/ALL/gem5.opt
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./build/ALL/gem5.opt configs/example/gem5_library/riscv-demo-board-run.py --workload=riscv-ubuntu-24.04-boot-no-systemd
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```
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"""
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import argparse
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import m5
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from gem5.prebuilt.demo.riscv_demo_board import RiscvDemoBoard
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from gem5.resources.resource import obtain_resource
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from gem5.simulate.exit_event import ExitEvent
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from gem5.simulate.simulator import Simulator
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parser = argparse.ArgumentParser()
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parser.add_argument(
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"--workload",
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help="Enter the name of the workload you would like to run. You can browse"
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" through the available workloads and resources at "
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"https://resources.gem5.org",
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)
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parser.add_argument(
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"--version",
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help="Enter the workload version you would like to use. The latest version"
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" will be used if this is left blank.",
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)
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args = parser.parse_args()
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board = RiscvDemoBoard()
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def handle_workend():
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print("Dump stats at the end of the ROI!")
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m5.stats.dump()
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yield False
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def handle_workbegin():
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print("Done booting Linux")
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print("Resetting stats at the start of ROI!")
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m5.stats.reset()
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yield False
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def exit_event_handler():
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print("first exit event: Kernel booted")
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yield False
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print("second exit event: In after boot")
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yield False
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print("third exit event: After run script")
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yield True
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board.set_workload(
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obtain_resource(resource_id=args.workload, resource_version=args.version)
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)
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simulator = Simulator(
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board=board,
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on_exit_event={
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ExitEvent.WORKBEGIN: handle_workbegin(),
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ExitEvent.WORKEND: handle_workend(),
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ExitEvent.EXIT: exit_event_handler(),
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},
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)
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simulator.run()
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