6b4dbdcedb
Gem5 resource update: https://github.com/gem5/gem5-resources/pull/25 Gem5 issue: https://github.com/gem5/gem5/issues/883 Change-Id: I1892d7591d6fa49d0563623fd90292e0d38d9ba3
401 lines
10 KiB
Python
401 lines
10 KiB
Python
# Copyright (c) 2022 The Regents of the University of California
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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from testlib import *
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if config.bin_path:
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resource_path = config.bin_path
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else:
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resource_path = joinpath(absdirpath(__file__), "..", "resources")
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# The following lists the RISCV binaries. Those commented out presently result
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# in a test failure. This is outlined in the following Jira issue:
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# https://gem5.atlassian.net/browse/GEM5-496
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rv64_binaries = (
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"rv64samt-ps-sysclone_d",
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"rv64samt-ps-sysfutex1_d",
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# 'rv64samt-ps-sysfutex2_d',
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"rv64samt-ps-sysfutex3_d",
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# 'rv64samt-ps-sysfutex_d',
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"rv64ua-ps-amoadd_d",
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"rv64ua-ps-amoadd_w",
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"rv64ua-ps-amoand_d",
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"rv64ua-ps-amoand_w",
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"rv64ua-ps-amomax_d",
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"rv64ua-ps-amomax_w",
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"rv64ua-ps-amomaxu_d",
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"rv64ua-ps-amomaxu_w",
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"rv64ua-ps-amomin_d",
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"rv64ua-ps-amomin_w",
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"rv64ua-ps-amominu_d",
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"rv64ua-ps-amominu_w",
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"rv64ua-ps-amoor_d",
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"rv64ua-ps-amoor_w",
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"rv64ua-ps-amoswap_d",
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"rv64ua-ps-amoswap_w",
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"rv64ua-ps-amoxor_d",
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"rv64ua-ps-amoxor_w",
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"rv64ua-ps-lrsc",
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"rv64uamt-ps-amoadd_d",
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"rv64uamt-ps-amoand_d",
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"rv64uamt-ps-amomax_d",
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"rv64uamt-ps-amomaxu_d",
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"rv64uamt-ps-amomin_d",
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"rv64uamt-ps-amominu_d",
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"rv64uamt-ps-amoor_d",
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"rv64uamt-ps-amoswap_d",
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"rv64uamt-ps-amoxor_d",
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"rv64uamt-ps-lrsc_d",
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"rv64uc-ps-rvc",
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"rv64ud-ps-fadd",
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"rv64ud-ps-fclass",
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"rv64ud-ps-fcmp",
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"rv64ud-ps-fcvt",
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"rv64ud-ps-fcvt_w",
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"rv64ud-ps-fdiv",
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"rv64ud-ps-fmadd",
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"rv64ud-ps-fmin",
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"rv64ud-ps-ldst",
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"rv64ud-ps-move",
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"rv64ud-ps-recoding",
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"rv64ud-ps-structural",
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"rv64uf-ps-fadd",
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"rv64uf-ps-fclass",
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"rv64uf-ps-fcmp",
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"rv64uf-ps-fcvt",
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"rv64uf-ps-fcvt_w",
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"rv64uf-ps-fdiv",
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"rv64uf-ps-fmadd",
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"rv64uf-ps-fmin",
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"rv64uf-ps-ldst",
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"rv64uf-ps-move",
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"rv64uf-ps-recoding",
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"rv64ui-ps-add",
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"rv64ui-ps-addi",
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"rv64ui-ps-addiw",
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"rv64ui-ps-addw",
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"rv64ui-ps-and",
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"rv64ui-ps-andi",
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"rv64ui-ps-auipc",
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"rv64ui-ps-beq",
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"rv64ui-ps-bge",
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"rv64ui-ps-bgeu",
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"rv64ui-ps-blt",
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"rv64ui-ps-bltu",
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"rv64ui-ps-bne",
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"rv64ui-ps-fence_i",
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"rv64ui-ps-jal",
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"rv64ui-ps-jalr",
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"rv64ui-ps-lb",
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"rv64ui-ps-lbu",
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"rv64ui-ps-ld",
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"rv64ui-ps-lh",
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"rv64ui-ps-lhu",
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"rv64ui-ps-lui",
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"rv64ui-ps-lw",
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"rv64ui-ps-lwu",
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"rv64ui-ps-or",
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"rv64ui-ps-ori",
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"rv64ui-ps-sb",
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"rv64ui-ps-sd",
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"rv64ui-ps-sh",
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"rv64ui-ps-simple",
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"rv64ui-ps-sll",
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"rv64ui-ps-slli",
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"rv64ui-ps-slliw",
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"rv64ui-ps-sllw",
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"rv64ui-ps-slt",
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"rv64ui-ps-slti",
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"rv64ui-ps-sltiu",
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"rv64ui-ps-sltu",
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"rv64ui-ps-sra",
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"rv64ui-ps-srai",
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"rv64ui-ps-sraiw",
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"rv64ui-ps-sraw",
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"rv64ui-ps-srl",
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"rv64ui-ps-srli",
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"rv64ui-ps-srliw",
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"rv64ui-ps-srlw",
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"rv64ui-ps-sub",
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"rv64ui-ps-subw",
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"rv64ui-ps-sw",
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"rv64ui-ps-xor",
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"rv64ui-ps-xori",
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"rv64um-ps-div",
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"rv64um-ps-divu",
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"rv64um-ps-divuw",
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"rv64um-ps-divw",
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"rv64um-ps-mul",
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"rv64um-ps-mulh",
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"rv64um-ps-mulhsu",
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"rv64um-ps-mulhu",
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"rv64um-ps-mulw",
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"rv64um-ps-rem",
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"rv64um-ps-remu",
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"rv64um-ps-remuw",
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"rv64um-ps-remw",
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"rv64uzfh-ps-fadd",
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"rv64uzfh-ps-fclass",
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"rv64uzfh-ps-fcmp",
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"rv64uzfh-ps-fcvt",
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"rv64uzfh-ps-fcvt_w",
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"rv64uzfh-ps-fdiv",
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"rv64uzfh-ps-fmadd",
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"rv64uzfh-ps-fmin",
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"rv64uzfh-ps-ldst",
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"rv64uzfh-ps-move",
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"rv64uzfh-ps-recoding",
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"rv64uzba-ps-add_uw",
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"rv64uzba-ps-sh1add",
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"rv64uzba-ps-sh1add_uw",
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"rv64uzba-ps-sh2add",
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"rv64uzba-ps-sh2add_uw",
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"rv64uzba-ps-sh3add",
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"rv64uzba-ps-sh3add_uw",
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"rv64uzba-ps-slli_uw",
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"rv64uzbb-ps-andn",
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"rv64uzbb-ps-clz",
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"rv64uzbb-ps-clzw",
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"rv64uzbb-ps-cpop",
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"rv64uzbb-ps-cpopw",
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"rv64uzbb-ps-ctz",
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"rv64uzbb-ps-ctzw",
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"rv64uzbb-ps-max",
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"rv64uzbb-ps-maxu",
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"rv64uzbb-ps-min",
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"rv64uzbb-ps-minu",
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"rv64uzbb-ps-orc_b",
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"rv64uzbb-ps-orn",
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"rv64uzbb-ps-rev8",
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"rv64uzbb-ps-rol",
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"rv64uzbb-ps-rolw",
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"rv64uzbb-ps-ror",
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"rv64uzbb-ps-rori",
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"rv64uzbb-ps-roriw",
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"rv64uzbb-ps-rorw",
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"rv64uzbb-ps-sext_b",
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"rv64uzbb-ps-sext_h",
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"rv64uzbb-ps-xnor",
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"rv64uzbb-ps-zext_h",
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"rv64uzbc-ps-clmul",
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"rv64uzbc-ps-clmulh",
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"rv64uzbc-ps-clmulr",
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"rv64uzbs-ps-bclr",
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"rv64uzbs-ps-bclri",
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"rv64uzbs-ps-bext",
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"rv64uzbs-ps-bexti",
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"rv64uzbs-ps-binv",
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"rv64uzbs-ps-binvi",
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"rv64uzbs-ps-bset",
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"rv64uzbs-ps-bseti",
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)
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rv32_binaries = (
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"rv32ua-ps-amoadd_w",
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"rv32ua-ps-amoand_w",
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"rv32ua-ps-amomaxu_w",
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"rv32ua-ps-amomax_w",
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"rv32ua-ps-amominu_w",
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"rv32ua-ps-amomin_w",
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"rv32ua-ps-amoor_w",
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"rv32ua-ps-amoswap_w",
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"rv32ua-ps-amoxor_w",
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"rv32ua-ps-lrsc",
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"rv32uamt-ps-amoadd_w",
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"rv32uamt-ps-amoand_w",
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"rv32uamt-ps-amomaxu_w",
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"rv32uamt-ps-amomax_w",
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"rv32uamt-ps-amominu_w",
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"rv32uamt-ps-amomin_w",
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"rv32uamt-ps-amoor_w",
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"rv32uamt-ps-amoswap_w",
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"rv32uamt-ps-amoxor_w",
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"rv32uamt-ps-lrsc_w",
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"rv32uc-ps-rvc",
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"rv32ud-ps-fadd",
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"rv32ud-ps-fclass",
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"rv32ud-ps-fcmp",
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"rv32ud-ps-fcvt",
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"rv32ud-ps-fcvt_w",
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"rv32ud-ps-fdiv",
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"rv32ud-ps-fmadd",
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"rv32ud-ps-fmin",
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"rv32ud-ps-ldst",
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"rv32ud-ps-recoding",
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"rv32uf-ps-fadd",
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"rv32uf-ps-fclass",
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"rv32uf-ps-fcmp",
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"rv32uf-ps-fcvt",
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"rv32uf-ps-fcvt_w",
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"rv32uf-ps-fdiv",
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"rv32uf-ps-fmadd",
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"rv32uf-ps-fmin",
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"rv32uf-ps-ldst",
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"rv32uf-ps-move",
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"rv32uf-ps-recoding",
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"rv32ui-ps-add",
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"rv32ui-ps-addi",
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"rv32ui-ps-and",
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"rv32ui-ps-andi",
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"rv32ui-ps-auipc",
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"rv32ui-ps-beq",
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"rv32ui-ps-bge",
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"rv32ui-ps-bgeu",
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"rv32ui-ps-blt",
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"rv32ui-ps-bltu",
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"rv32ui-ps-bne",
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"rv32ui-ps-fence_i",
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"rv32ui-ps-jal",
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"rv32ui-ps-jalr",
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"rv32ui-ps-lb",
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"rv32ui-ps-lbu",
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"rv32ui-ps-lh",
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"rv32ui-ps-lhu",
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"rv32ui-ps-lui",
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"rv32ui-ps-lw",
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"rv32ui-ps-or",
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"rv32ui-ps-ori",
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"rv32ui-ps-sb",
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"rv32ui-ps-sh",
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"rv32ui-ps-simple",
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"rv32ui-ps-sll",
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"rv32ui-ps-slli",
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"rv32ui-ps-slt",
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"rv32ui-ps-slti",
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"rv32ui-ps-sltiu",
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"rv32ui-ps-sltu",
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"rv32ui-ps-sra",
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"rv32ui-ps-srai",
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"rv32ui-ps-srl",
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"rv32ui-ps-srli",
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"rv32ui-ps-sub",
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"rv32ui-ps-sw",
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"rv32ui-ps-xor",
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"rv32ui-ps-xori",
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"rv32um-ps-div",
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"rv32um-ps-divu",
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"rv32um-ps-mul",
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"rv32um-ps-mulh",
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"rv32um-ps-mulhsu",
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"rv32um-ps-mulhu",
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"rv32um-ps-rem",
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"rv32um-ps-remu",
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"rv32uzfh-ps-fadd",
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"rv32uzfh-ps-fclass",
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"rv32uzfh-ps-fcmp",
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"rv32uzfh-ps-fcvt",
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"rv32uzfh-ps-fcvt_w",
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"rv32uzfh-ps-fdiv",
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"rv32uzfh-ps-fmadd",
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"rv32uzfh-ps-fmin",
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"rv32uzfh-ps-ldst",
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"rv32uzfh-ps-move",
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"rv32uzfh-ps-recoding",
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"rv32uzba-ps-sh1add",
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"rv32uzba-ps-sh2add",
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"rv32uzba-ps-sh3add",
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"rv32uzbb-ps-andn",
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"rv32uzbb-ps-clz",
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"rv32uzbb-ps-cpop",
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"rv32uzbb-ps-ctz",
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"rv32uzbb-ps-max",
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"rv32uzbb-ps-maxu",
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"rv32uzbb-ps-min",
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"rv32uzbb-ps-minu",
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"rv32uzbb-ps-orc_b",
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"rv32uzbb-ps-orn",
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"rv32uzbb-ps-rev8",
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"rv32uzbb-ps-rol",
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"rv32uzbb-ps-ror",
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"rv32uzbb-ps-rori",
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"rv32uzbb-ps-sext_b",
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"rv32uzbb-ps-sext_h",
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"rv32uzbb-ps-xnor",
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"rv32uzbb-ps-zext_h",
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"rv32uzbc-ps-clmul",
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"rv32uzbc-ps-clmulh",
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"rv32uzbc-ps-clmulr",
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"rv32uzbs-ps-bclr",
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"rv32uzbs-ps-bclri",
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"rv32uzbs-ps-bext",
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"rv32uzbs-ps-bexti",
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"rv32uzbs-ps-binv",
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"rv32uzbs-ps-binvi",
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"rv32uzbs-ps-bset",
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"rv32uzbs-ps-bseti",
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)
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cpu_types = ("atomic", "timing", "minor", "o3")
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for cpu_type in cpu_types:
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for binary in rv64_binaries:
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gem5_verify_config(
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name=f"asm-riscv-{binary}-{cpu_type}",
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verifiers=(),
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config=joinpath(
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config.base_dir,
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"tests",
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"gem5",
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"asmtest",
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"configs",
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"riscv_asmtest.py",
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),
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config_args=[
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binary,
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cpu_type,
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"--num-cores",
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"4",
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"--resource-directory",
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resource_path,
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],
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valid_isas=(constants.all_compiled_tag,),
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valid_hosts=constants.supported_hosts,
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)
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for binary in rv32_binaries:
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gem5_verify_config(
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name=f"asm-riscv-{binary}-{cpu_type}",
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verifiers=(),
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config=joinpath(
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config.base_dir,
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"tests",
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"gem5",
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"asmtest",
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"configs",
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"riscv_asmtest.py",
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),
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config_args=[
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binary,
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cpu_type,
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"--num-cores",
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"4",
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"--riscv-32bits",
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"--resource-directory",
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resource_path,
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],
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valid_isas=(constants.all_compiled_tag,),
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valid_hosts=constants.supported_hosts,
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)
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