Matthias Boettcher e4dccbea8a arch-arm: Partial SVE2 Implementation ...

Instructions added:

BGRP, RAX1, EOR3, BCAX,
XAR & TBX, PMUL, PMULLB/T, SMULLB/T and UMULLB/T

Change-Id: Ia135ba9300eae312b24342bcbda835fef6867113

2023-12-06 14:26:31 +00:00

..

amdgpu

misc: Run pre-commit run --all-files

2023-11-29 22:06:41 -08:00

arm

arch-arm: Partial SVE2 Implementation

2023-12-06 14:26:31 +00:00

generic

base: Add encapsulation to the loader::Symbol class

2023-12-01 22:00:26 +00:00

isa_parser

misc: Run pre-commit run --all-files

2023-11-29 22:06:41 -08:00

mips

base: Add encapsulation to the loader::Symbol class

2023-12-01 22:00:26 +00:00

null

scons: Update the Kconfig build options

2023-11-23 08:26:11 +08:00

power

base: Add encapsulation to the loader::Symbol class

2023-12-01 22:00:26 +00:00

riscv

arch-riscv: fix o3 cpu stuck in spinlock bug (#641)

2023-12-03 13:22:46 -08:00

sparc

base: Add encapsulation to the loader::Symbol class

2023-12-01 22:00:26 +00:00

x86

misc,python: Add isort hook to pre-commit (#431)

2023-11-30 09:54:12 +00:00

Kconfig

scons: Update the Kconfig build options

2023-11-23 08:26:11 +08:00

micro_asm_test.py

misc: Run pre-commit run --all-files

2023-11-29 22:06:41 -08:00

micro_asm.py

misc: Run pre-commit run --all-files

2023-11-29 22:06:41 -08:00

SConscript

scons: Update the Kconfig build options

2023-11-23 08:26:11 +08:00