e1db67c4bd
This commit contains the rest of the base 2 vs base 10 cache/memory size clarifications. It also changes the warning message to use warn(). With these changes, the warning message should now no longer show up during a fresh compilation of gem5. Change-Id: Ia63f841bdf045b76473437f41548fab27dc19631
88 lines
3.3 KiB
Python
88 lines
3.3 KiB
Python
# Copyright (c) 2022 The Regents of the University of California
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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"""
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This gem5 configuration script runs the RISCVMatchedBoard in FS mode with a
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an Ubuntu 20.04 image and calls m5 exit after the simulation has booted the OS.
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Usage
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---
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```
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scons build/RISCV/gem5.opt
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./build/RISCV/gem5.opt configs/example/gem5_library/riscvmatched-fs.py
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```
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"""
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import argparse
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from gem5.isas import ISA
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from gem5.prebuilt.riscvmatched.riscvmatched_board import RISCVMatchedBoard
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from gem5.resources.resource import obtain_resource
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from gem5.simulate.simulator import Simulator
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from gem5.utils.requires import requires
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requires(isa_required=ISA.RISCV)
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parser = argparse.ArgumentParser(
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description="A script which uses the RISCVMatchedBoard in FS mode."
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)
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parser.add_argument(
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"-i",
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"--to-init",
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action="store_true",
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help="Exit the simulation after the Linux Kernel boot.",
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)
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args = parser.parse_args()
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# instantiate the riscv matched board with default parameters
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board = RISCVMatchedBoard(
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clk_freq="1.2GHz",
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l2_size="2MiB",
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is_fs=True,
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)
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# Here we a full system workload: "riscv-ubuntu-20.04-boot" which boots
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# Ubuntu 20.04. Once the system successfully boots it encounters an `m5_exit`
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# instruction which stops the simulation. When the simulation has ended you may
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# inspect `m5out/system.pc.com_1.device` to see the stdout.
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#
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# In the case where the `-i` flag is passed, we add the kernel argument
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# `init=/root/exit.sh`. This means the simulation will exit after the Linux
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# Kernel has booted.
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workload = obtain_resource("riscv-ubuntu-20.04-boot", resource_version="3.0.0")
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kernel_args = board.get_default_kernel_args()
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if args.to_init:
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kernel_args.append("init=/root/exit.sh")
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workload.set_parameter("kernel_args", kernel_args)
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board.set_workload(workload)
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simulator = Simulator(board=board)
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simulator.run()
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