This commit contains the rest of the base 2 vs base 10 cache/memory size clarifications. It also changes the warning message to use warn(). With these changes, the warning message should now no longer show up during a fresh compilation of gem5. Change-Id: Ia63f841bdf045b76473437f41548fab27dc19631
144 lines
5.6 KiB
Python
144 lines
5.6 KiB
Python
# Copyright (c) 2022-23 The Regents of the University of California
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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"""
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This script further shows an example of booting an ARM based full system Ubuntu
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disk image. This simulation boots the disk image using 2 TIMING CPU cores. The
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simulation ends when the startup is completed successfully (i.e. when an
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`m5_exit instruction is reached on successful boot).
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Usage
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-----
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```
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scons build/ARM/gem5.opt -j<NUM_CPUS>
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./build/ARM/gem5.opt configs/example/gem5_library/arm-ubuntu-run-with-kvm.py
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```
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"""
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from m5.objects import (
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ArmDefaultRelease,
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VExpress_GEM5_V1,
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)
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from gem5.coherence_protocol import CoherenceProtocol
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from gem5.components.boards.arm_board import ArmBoard
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from gem5.components.memory import DualChannelDDR4_2400
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from gem5.components.processors.cpu_types import CPUTypes
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from gem5.components.processors.simple_switchable_processor import (
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SimpleSwitchableProcessor,
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)
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from gem5.isas import ISA
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from gem5.resources.resource import obtain_resource
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from gem5.simulate.exit_event import ExitEvent
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from gem5.simulate.simulator import Simulator
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from gem5.utils.requires import requires
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# This runs a check to ensure the gem5 binary is compiled for ARM.
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requires(isa_required=ISA.ARM)
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from gem5.components.cachehierarchies.classic.private_l1_private_l2_cache_hierarchy import (
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PrivateL1PrivateL2CacheHierarchy,
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)
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# Here we setup the parameters of the l1 and l2 caches.
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cache_hierarchy = PrivateL1PrivateL2CacheHierarchy(
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l1d_size="16KiB", l1i_size="16KiB", l2_size="256KiB"
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)
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# Memory: Dual Channel DDR4 2400 DRAM device.
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memory = DualChannelDDR4_2400(size="2GiB")
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# Here we setup the processor. This is a special switchable processor in which
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# a starting core type and a switch core type must be specified. Once a
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# configuration is instantiated a user may call `processor.switch()` to switch
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# from the starting core types to the switch core types. In this simulation
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# we start with KVM cores to simulate the OS boot, then switch to the Timing
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# cores for the command we wish to run after boot.
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processor = SimpleSwitchableProcessor(
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starting_core_type=CPUTypes.KVM,
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switch_core_type=CPUTypes.TIMING,
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isa=ISA.ARM,
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num_cores=2,
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)
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# The ArmBoard requires a `release` to be specified. This adds all the
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# extensions or features to the system. We are setting this to for_kvm()
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# to enable KVM simulation.
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release = ArmDefaultRelease.for_kvm()
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# The platform sets up the memory ranges of all the on-chip and off-chip
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# devices present on the ARM system. ARM KVM only works with VExpress_GEM5_V1
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# on the ArmBoard at the moment.
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platform = VExpress_GEM5_V1()
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# Here we setup the board. The ArmBoard allows for Full-System ARM simulations.
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board = ArmBoard(
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clk_freq="3GHz",
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processor=processor,
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memory=memory,
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cache_hierarchy=cache_hierarchy,
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release=release,
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platform=platform,
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)
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# This is the command to run after the system has booted. The first `m5 exit`
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# will stop the simulation so we can switch the CPU cores from KVM to timing
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# and continue the simulation to run the echo command, sleep for a second,
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# then, again, call `m5 exit` to terminate the simulation. After simulation
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# has ended you may inspect `m5out/system.pc.com_1.device` to see the echo
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# output.
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command = (
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"m5 --addr=0x10010000 exit;"
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+ "echo 'This is running on Timing CPU cores.';"
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+ "m5 exit;"
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)
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# Here we set a full system workload. The "arm64-ubuntu-20.04-boot" boots
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# Ubuntu 20.04. We use arm64-bootloader (boot.arm64) as the bootloader to use
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# ARM KVM.
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board.set_kernel_disk_workload(
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kernel=obtain_resource(
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"arm64-linux-kernel-5.4.49", resource_version="1.0.0"
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),
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disk_image=obtain_resource(
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"arm64-ubuntu-20.04-img", resource_version="1.0.0"
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),
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bootloader=obtain_resource("arm64-bootloader", resource_version="1.0.0"),
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readfile_contents=command,
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)
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# We define the system with the aforementioned system defined.
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simulator = Simulator(
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board=board,
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on_exit_event={ExitEvent.EXIT: (func() for func in [processor.switch])},
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)
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# Once the system successfully boots, it encounters an
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# `m5_exit instruction encountered`. We stop the simulation then. When the
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# simulation has ended you may inspect `m5out/board.terminal` to see
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# the stdout.
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simulator.run()
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