33b28fde7a
This changeset contains a lot of different changes that are too mingled to separate. They are: 1. Added MOESI_CMP_directory I made the changes necessary to bring back MOESI_CMP_directory, including adding a DMA controller. I got rid of MOESI_CMP_directory_m and made MOESI_CMP_directory use a memory controller. Added a new configuration for two level protocols in general, and MOESI_CMP_directory in particular. 2. DMA Sequencer uses a generic SequencerMsg I will eventually make the cache Sequencer use this type as well. It doesn't contain an offset field, just a physical address and a length. MI_example has been updated to deal with this. 3. Parameterized Controllers SLICC controllers can now take custom parameters to use for mapping, latencies, etc. Currently, only int parameters are supported.
61 lines
2.7 KiB
Plaintext
61 lines
2.7 KiB
Plaintext
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/*
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* Copyright (c) 1999-2005 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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// Mapping functions
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// NodeID map_address_to_node(Address addr);
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MachineID mapAddressToRange(Address addr, MachineType type, int low, int high);
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MachineID map_Address_to_DMA(Address addr);
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MachineID map_Address_to_Directory(Address addr);
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NodeID map_Address_to_DirectoryNode(Address addr);
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MachineID getL1MachineID(NodeID L1RubyNode);
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NodeID getChipID(MachineID L2machID);
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MachineID getCollectorDest(MachineID L1machID);
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MachineID getCollectorL1Cache(MachineID colID);
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NetDest getMultiStaticL2BankNetDest(Address addr, Set sharers);
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bool isL1OnChip(MachineID L1machID, NodeID L2NodeID);
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bool isL2OnChip(MachineID L2machID, NodeID L2NodeID);
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int getNumBanksInBankSet();
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NodeID machineIDToNodeID(MachineID machID);
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NodeID machineIDToVersion(MachineID machID);
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MachineType machineIDToMachineType(MachineID machID);
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NodeID L1CacheMachIDToProcessorNum(MachineID machID);
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NodeID L2CacheMachIDToChipID(MachineID machID);
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Set getOtherLocalL1IDs(MachineID L1);
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Set getLocalL1IDs(MachineID L1);
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Set getExternalL1IDs(MachineID L1);
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NetDest getAllPertinentL2Banks(Address addr);
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bool isLocalProcessor(MachineID thisId, MachineID tarId);
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GenericMachineType ConvertMachToGenericMach(MachineType machType);
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