d11c40dcac
This ensures `isort` is applied to all files in the repo. Change-Id: Ib7ced1c924ef1639542bf0d1a01c5737f6ba43e9
81 lines
3.4 KiB
Python
81 lines
3.4 KiB
Python
# Copyright (c) 2023 The Regents of the University of California
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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"""
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This script shows how to use a suite. In this example, we will use the
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RISCVMatchedBoard and the RISCV Vertical Microbenchmark Suite,
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and show the different functionalities of the suite.
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The print statements in the script are for illustrative purposes only,
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and are not required to run the script.
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"""
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from gem5.isas import ISA
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from gem5.prebuilt.riscvmatched.riscvmatched_board import RISCVMatchedBoard
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from gem5.resources.resource import obtain_resource
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from gem5.simulate.simulator import Simulator
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from gem5.utils.requires import requires
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requires(isa_required=ISA.RISCV)
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# instantiate the riscv matched board with default parameters
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board = RISCVMatchedBoard()
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# obtain the RISC-V Vertical Microbenchmarks
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microbenchmarks = obtain_resource("riscv-vertical-microbenchmarks")
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# list all the microbenchmarks present in the suite
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print("Microbenchmarks present in the suite:")
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print("====================================")
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for workload in microbenchmarks:
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print(f"Workload ID: {workload.get_id()}")
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print(f"Workload Version: {workload.get_resource_version()}")
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print(f"WorkloadResource Object: {workload}")
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print("====================================")
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# list all the WorkloadResource objects present in the suite
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for resource in microbenchmarks:
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print(f"WorkloadResource Object: {resource}")
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# list all the available input groups in the suite
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print("Input groups present in the suite:")
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print(microbenchmarks.get_input_groups())
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# for this example, we will filter the suite
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# to run the Workload "riscv-cca-run"
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# it has the input group 'cca', which is used as the filter
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board.set_workload(list(microbenchmarks.with_input_group("cca"))[0])
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# run the simulation with the RISCV Matched board
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simulator = Simulator(board=board, full_system=False)
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simulator.run()
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print(
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"Exiting @ tick {} because {}.".format(
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simulator.get_current_tick(),
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simulator.get_last_exit_event_cause(),
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)
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)
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