d6289507d8
Frame buffer and boot linux: ./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmLinuxFrameBuf --kernel=vmlinux.touchkit Linux from a CF card: ./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmLinuxCflash --kernel=vmlinux.touchkit Run Android ./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmAndroid --kernel=vmlinux.android Run MP ./build/ARM_FS/m5.opt configs/example/fs.py --benchmark=ArmLinuxCflash --kernel=vmlinux.mp-2.6.38
259 lines
11 KiB
Python
259 lines
11 KiB
Python
# Copyright (c) 2009 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Copyright (c) 2006-2007 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Ali Saidi
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# Gabe Black
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# William Wang
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from m5.params import *
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from m5.proxy import *
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from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice
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from Ide import *
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from Platform import Platform
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from Terminal import Terminal
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from Uart import Uart
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class AmbaDevice(BasicPioDevice):
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type = 'AmbaDevice'
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abstract = True
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amba_id = Param.UInt32("ID of AMBA device for kernel detection")
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class AmbaIntDevice(AmbaDevice):
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type = 'AmbaIntDevice'
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abstract = True
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gic = Param.Gic(Parent.any, "Gic to use for interrupting")
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int_num = Param.UInt32("Interrupt number that connects to GIC")
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int_delay = Param.Latency("100ns",
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"Time between action and interrupt generation by device")
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class AmbaDmaDevice(DmaDevice):
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type = 'AmbaDmaDevice'
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abstract = True
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pio_addr = Param.Addr("Address for AMBA slave interface")
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pio_latency = Param.Latency("10ns", "Time between action and write/read result by AMBA DMA Device")
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gic = Param.Gic(Parent.any, "Gic to use for interrupting")
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int_num = Param.UInt32("Interrupt number that connects to GIC")
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amba_id = Param.UInt32("ID of AMBA device for kernel detection")
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class RealViewCtrl(BasicPioDevice):
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type = 'RealViewCtrl'
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proc_id = Param.UInt32(0x0C000000, "Platform ID")
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class Gic(PioDevice):
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type = 'Gic'
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dist_addr = Param.Addr(0x1f001000, "Address for distributor")
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cpu_addr = Param.Addr(0x1f000100, "Address for cpu")
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dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor")
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cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu")
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it_lines = Param.UInt32(128, "Number of interrupt lines supported (max = 1020)")
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class AmbaFake(AmbaDevice):
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type = 'AmbaFake'
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ignore_access = Param.Bool(False, "Ignore reads/writes to this device, (e.g. IsaFake + AMBA)")
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amba_id = 0;
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class Pl011(Uart):
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type = 'Pl011'
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gic = Param.Gic(Parent.any, "Gic to use for interrupting")
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int_num = Param.UInt32("Interrupt number that connects to GIC")
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end_on_eot = Param.Bool(False, "End the simulation when a EOT is received on the UART")
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int_delay = Param.Latency("100ns", "Time between action and interrupt generation by UART")
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class Sp804(AmbaDevice):
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type = 'Sp804'
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gic = Param.Gic(Parent.any, "Gic to use for interrupting")
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int_num0 = Param.UInt32("Interrupt number that connects to GIC")
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clock0 = Param.Clock('1MHz', "Clock speed of the input")
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int_num1 = Param.UInt32("Interrupt number that connects to GIC")
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clock1 = Param.Clock('1MHz', "Clock speed of the input")
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amba_id = 0x00141804
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class Pl050(AmbaIntDevice):
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type = 'Pl050'
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vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display")
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is_mouse = Param.Bool(False, "Is this interface a mouse, if not a keyboard")
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int_delay = '1us'
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amba_id = 0x00141050
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class Pl111(AmbaDmaDevice):
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type = 'Pl111'
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clock = Param.Clock('24MHz', "Clock speed of the input")
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vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display")
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amba_id = 0x00141111
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class RealView(Platform):
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type = 'RealView'
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system = Param.System(Parent.any, "system")
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# Reference for memory map and interrupt number
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# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A)
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# Chapter 4: Programmer's Reference
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class RealViewPBX(RealView):
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uart = Pl011(pio_addr=0x10009000, int_num=44)
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realview_io = RealViewCtrl(pio_addr=0x10000000)
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gic = Gic()
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timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
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timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
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clcd = Pl111(pio_addr=0x10020000, int_num=55)
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kmi0 = Pl050(pio_addr=0x10006000, int_num=52)
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kmi1 = Pl050(pio_addr=0x10007000, int_num=53, is_mouse=True)
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cf_ctrl = IdeController(disks=[], pci_func=0, pci_dev=0, pci_bus=0,
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io_shift = 1, ctrl_offset = 2, Command = 0x1,
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BAR0 = 0x18000000, BAR0Size = '16B',
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BAR1 = 0x18000100, BAR1Size = '1B',
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BAR0LegacyIO = True, BAR1LegacyIO = True)
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l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff)
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flash_fake = IsaFake(pio_addr=0x40000000, pio_size=0x4000000)
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dmac_fake = AmbaFake(pio_addr=0x10030000)
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uart1_fake = AmbaFake(pio_addr=0x1000a000)
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uart2_fake = AmbaFake(pio_addr=0x1000b000)
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uart3_fake = AmbaFake(pio_addr=0x1000c000)
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smc_fake = AmbaFake(pio_addr=0x100e1000)
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sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True)
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watchdog_fake = AmbaFake(pio_addr=0x10010000)
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gpio0_fake = AmbaFake(pio_addr=0x10013000)
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gpio1_fake = AmbaFake(pio_addr=0x10014000)
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gpio2_fake = AmbaFake(pio_addr=0x10015000)
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ssp_fake = AmbaFake(pio_addr=0x1000d000)
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sci_fake = AmbaFake(pio_addr=0x1000e000)
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aaci_fake = AmbaFake(pio_addr=0x10004000)
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mmc_fake = AmbaFake(pio_addr=0x10005000)
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rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
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# Attach I/O devices that are on chip
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def attachOnChipIO(self, bus):
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self.gic.pio = bus.port
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self.l2x0_fake.pio = bus.port
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# Attach I/O devices to specified bus object. Can't do this
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# earlier, since the bus object itself is typically defined at the
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# System level.
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def attachIO(self, bus):
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self.uart.pio = bus.port
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self.realview_io.pio = bus.port
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self.timer0.pio = bus.port
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self.timer1.pio = bus.port
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self.clcd.pio = bus.port
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self.kmi0.pio = bus.port
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self.kmi1.pio = bus.port
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self.cf_ctrl.pio = bus.port
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self.dmac_fake.pio = bus.port
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self.uart1_fake.pio = bus.port
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self.uart2_fake.pio = bus.port
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self.uart3_fake.pio = bus.port
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self.smc_fake.pio = bus.port
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self.sp810_fake.pio = bus.port
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self.watchdog_fake.pio = bus.port
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self.gpio0_fake.pio = bus.port
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self.gpio1_fake.pio = bus.port
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self.gpio2_fake.pio = bus.port
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self.ssp_fake.pio = bus.port
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self.sci_fake.pio = bus.port
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self.aaci_fake.pio = bus.port
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self.mmc_fake.pio = bus.port
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self.rtc_fake.pio = bus.port
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self.flash_fake.pio = bus.port
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# Reference for memory map and interrupt number
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# RealView Emulation Baseboard User Guide (ARM DUI 0143B)
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# Chapter 4: Programmer's Reference
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class RealViewEB(RealView):
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uart = Pl011(pio_addr=0x10009000, int_num=44)
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realview_io = RealViewCtrl(pio_addr=0x10000000)
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gic = Gic(dist_addr=0x10041000, cpu_addr=0x10040000)
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timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
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timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
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clcd = Pl111(pio_addr=0x10020000, int_num=23)
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kmi0 = Pl050(pio_addr=0x10006000, int_num=20)
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kmi1 = Pl050(pio_addr=0x10007000, int_num=21, is_mouse=True)
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l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, warn_access="1")
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dmac_fake = AmbaFake(pio_addr=0x10030000)
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uart1_fake = AmbaFake(pio_addr=0x1000a000)
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uart2_fake = AmbaFake(pio_addr=0x1000b000)
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uart3_fake = AmbaFake(pio_addr=0x1000c000)
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smc_fake = AmbaFake(pio_addr=0x100e1000)
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sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True)
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watchdog_fake = AmbaFake(pio_addr=0x10010000)
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gpio0_fake = AmbaFake(pio_addr=0x10013000)
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gpio1_fake = AmbaFake(pio_addr=0x10014000)
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gpio2_fake = AmbaFake(pio_addr=0x10015000)
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ssp_fake = AmbaFake(pio_addr=0x1000d000)
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sci_fake = AmbaFake(pio_addr=0x1000e000)
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aaci_fake = AmbaFake(pio_addr=0x10004000)
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mmc_fake = AmbaFake(pio_addr=0x10005000)
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rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
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# Attach I/O devices that are on chip
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def attachOnChipIO(self, bus):
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self.gic.pio = bus.port
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self.l2x0_fake.pio = bus.port
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# Attach I/O devices to specified bus object. Can't do this
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# earlier, since the bus object itself is typically defined at the
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# System level.
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def attachIO(self, bus):
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self.uart.pio = bus.port
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self.realview_io.pio = bus.port
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self.timer0.pio = bus.port
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self.timer1.pio = bus.port
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self.clcd.pio = bus.port
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self.kmi0.pio = bus.port
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self.kmi1.pio = bus.port
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self.dmac_fake.pio = bus.port
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self.uart1_fake.pio = bus.port
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self.uart2_fake.pio = bus.port
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self.uart3_fake.pio = bus.port
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self.smc_fake.pio = bus.port
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self.sp810_fake.pio = bus.port
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self.watchdog_fake.pio = bus.port
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self.gpio0_fake.pio = bus.port
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self.gpio1_fake.pio = bus.port
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self.gpio2_fake.pio = bus.port
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self.ssp_fake.pio = bus.port
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self.sci_fake.pio = bus.port
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self.aaci_fake.pio = bus.port
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self.mmc_fake.pio = bus.port
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self.rtc_fake.pio = bus.port
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