Kevin Lim cbfbb7bc56 Updates to bring CPU portion of m5 up-to-date with newmem. ...

--HG--
extra : convert_revision : 00e6eefb24e6ffd9c7c5d8165db26fbf6199fdc4

2006-08-02 12:05:34 -04:00

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checker

Add in comments for checker.

2006-06-01 15:40:06 -04:00

memtest

Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.

2006-03-04 15:18:40 -05:00

o3

Updates to bring CPU portion of m5 up-to-date with newmem.

2006-08-02 12:05:34 -04:00

ozone

Updates to bring CPU portion of m5 up-to-date with newmem.

2006-08-02 12:05:34 -04:00

simple

Move kernel stats out of CPU and into XC.

2006-05-23 16:51:16 -04:00

trace

Made Addr a global type

2006-02-21 03:38:21 -05:00

activity.cc

Comments and code cleanup.

2006-05-31 11:45:02 -04:00

activity.hh

Comments and code cleanup.

2006-05-31 11:45:02 -04:00

base_dyn_inst.cc

Updates to bring CPU portion of m5 up-to-date with newmem.

2006-08-02 12:05:34 -04:00

base_dyn_inst.hh

Updates to bring CPU portion of m5 up-to-date with newmem.

2006-08-02 12:05:34 -04:00

base.cc

Move kernel stats out of CPU and into XC.

2006-05-23 16:51:16 -04:00

base.hh

Move kernel stats out of CPU and into XC.

2006-05-23 16:51:16 -04:00

cpu_exec_context.cc

Updates for registers and stuff.

2006-08-02 12:04:18 -04:00

cpu_exec_context.hh

Fix up kernel stats, allow them to not be used as well.

2006-05-25 11:50:42 -04:00

cpu_models.py

Add in checker. Supports dynamically verifying the execution of instructions, as well as limited amount of control path verification. It will verify anything within the program, but anything external (traps, interrupts, XC) it assumes is redirected properly by the CPU. Similarly it assumes the results of store conditionals, uncached loads, and instructions marked as "unverifiable" are correct from the CPU.

2006-05-16 13:59:29 -04:00

exec_context.hh

Move kernel stats out of CPU and into XC.

2006-05-23 16:51:16 -04:00

exetrace.cc

Allow the switching on and off of PC symbols for tracing.

2006-04-24 16:56:24 -04:00

exetrace.hh

Allow the switching on and off of PC symbols for tracing.

2006-04-24 16:56:24 -04:00

inst_seq.hh

Include option for disabling PC symbols.

2006-04-24 17:11:31 -04:00

intr_control.cc

Updates for the quiesceEvent that was added to the XC.

2006-03-07 19:59:12 -05:00

intr_control.hh

Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.

2006-03-04 15:18:40 -05:00

pc_event.cc

Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.

2006-03-04 15:18:40 -05:00

pc_event.hh

Made Addr a global type

2006-02-21 03:38:21 -05:00

profile.cc

Updates for the quiesceEvent that was added to the XC.

2006-03-07 19:59:12 -05:00

profile.hh

Updates for the quiesceEvent that was added to the XC.

2006-03-07 19:59:12 -05:00

quiesce_event.cc

Move quiesce event to its own class.

2006-04-22 18:11:54 -04:00

quiesce_event.hh

Move quiesce event to its own class.

2006-04-22 18:11:54 -04:00

SConscript

Remove sat_counter.cc and put its code into sat_counter.hh.

2006-05-19 15:47:55 -04:00

smt.hh

Many files:

2005-06-05 05:16:00 -04:00

static_inst.cc

Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths.

2006-02-19 02:34:37 -05:00

static_inst.hh

Add extra flags to help new CPU handle various instructions.

2006-05-23 14:38:16 -04:00

thread_state.hh

Updates to bring CPU portion of m5 up-to-date with newmem.

2006-08-02 12:05:34 -04:00