Andreas Hansson df8df4fd0a stats: Bump stats for decoder, TLB, prefetcher and DRAM changes ...

Changes due to speculative execution of an unaligned PC, introduction
of TLB stats, changes and re-work of the prefetcher, and the
introduction of rank-wise refresh in the DRAM controller.

2014-12-23 09:31:20 -05:00

..

minor-timing

stats: Bump stats for decoder, TLB, prefetcher and DRAM changes

2014-12-23 09:31:20 -05:00

o3-timing

stats: Bump stats for decoder, TLB, prefetcher and DRAM changes

2014-12-23 09:31:20 -05:00

simple-atomic

stats: updates due to changes to x86, stale configs.

2014-10-11 16:18:51 -05:00

simple-timing

stats: updates due to changes to x86, stale configs.

2014-10-11 16:18:51 -05:00

simple-timing-ruby

stats: Bump stats for decoder, TLB, prefetcher and DRAM changes

2014-12-23 09:31:20 -05:00

simple-timing-ruby-MESI_Two_Level

stats: Bump stats for decoder, TLB, prefetcher and DRAM changes

2014-12-23 09:31:20 -05:00

simple-timing-ruby-MOESI_CMP_directory

stats: Bump stats for decoder, TLB, prefetcher and DRAM changes

2014-12-23 09:31:20 -05:00

simple-timing-ruby-MOESI_CMP_token

stats: Bump stats for decoder, TLB, prefetcher and DRAM changes

2014-12-23 09:31:20 -05:00

simple-timing-ruby-MOESI_hammer

stats: Bump stats for decoder, TLB, prefetcher and DRAM changes

2014-12-23 09:31:20 -05:00