This patch implements the AArch32 AES instructions from the Crypto extension. Change-Id: I51e6deda748b0c26135bcfe9d0c7128f3af91f3d Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Matt Horsnell <matt.horsnell@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/13248 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
103 lines
5.0 KiB
C++
103 lines
5.0 KiB
C++
/*
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* Copyright (c) 2010,2018 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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*/
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#ifndef __CPU__OP_CLASS_HH__
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#define __CPU__OP_CLASS_HH__
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#include "enums/OpClass.hh"
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/*
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* Do a bunch of wonky stuff to maintain backward compatability so I
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* don't have to change code in a zillion places.
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*/
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using Enums::OpClass;
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using Enums::No_OpClass;
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static const OpClass IntAluOp = Enums::IntAlu;
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static const OpClass IntMultOp = Enums::IntMult;
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static const OpClass IntDivOp = Enums::IntDiv;
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static const OpClass FloatAddOp = Enums::FloatAdd;
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static const OpClass FloatCmpOp = Enums::FloatCmp;
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static const OpClass FloatCvtOp = Enums::FloatCvt;
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static const OpClass FloatMultOp = Enums::FloatMult;
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static const OpClass FloatMultAccOp = Enums::FloatMultAcc;
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static const OpClass FloatDivOp = Enums::FloatDiv;
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static const OpClass FloatMiscOp = Enums::FloatMisc;
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static const OpClass FloatSqrtOp = Enums::FloatSqrt;
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static const OpClass SimdAddOp = Enums::SimdAdd;
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static const OpClass SimdAddAccOp = Enums::SimdAddAcc;
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static const OpClass SimdAluOp = Enums::SimdAlu;
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static const OpClass SimdCmpOp = Enums::SimdCmp;
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static const OpClass SimdCvtOp = Enums::SimdCvt;
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static const OpClass SimdMiscOp = Enums::SimdMisc;
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static const OpClass SimdMultOp = Enums::SimdMult;
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static const OpClass SimdMultAccOp = Enums::SimdMultAcc;
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static const OpClass SimdShiftOp = Enums::SimdShift;
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static const OpClass SimdShiftAccOp = Enums::SimdShiftAcc;
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static const OpClass SimdSqrtOp = Enums::SimdSqrt;
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static const OpClass SimdFloatAddOp = Enums::SimdFloatAdd;
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static const OpClass SimdFloatAluOp = Enums::SimdFloatAlu;
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static const OpClass SimdFloatCmpOp = Enums::SimdFloatCmp;
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static const OpClass SimdFloatCvtOp = Enums::SimdFloatCvt;
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static const OpClass SimdFloatDivOp = Enums::SimdFloatDiv;
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static const OpClass SimdFloatMiscOp = Enums::SimdFloatMisc;
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static const OpClass SimdFloatMultOp = Enums::SimdFloatMult;
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static const OpClass SimdFloatMultAccOp = Enums::SimdFloatMultAcc;
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static const OpClass SimdFloatSqrtOp = Enums::SimdFloatSqrt;
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static const OpClass SimdAesOp = Enums::SimdAes;
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static const OpClass SimdAesMixOp = Enums::SimdAesMix;
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static const OpClass SimdSha1HashOp = Enums::SimdSha1Hash;
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static const OpClass SimdSha1Hash2Op = Enums::SimdSha1Hash2;
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static const OpClass SimdSha256HashOp = Enums::SimdSha256Hash;
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static const OpClass SimdSha256Hash2Op = Enums::SimdSha256Hash2;
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static const OpClass SimdShaSigma2Op = Enums::SimdShaSigma2;
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static const OpClass SimdShaSigma3Op = Enums::SimdShaSigma3;
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static const OpClass MemReadOp = Enums::MemRead;
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static const OpClass MemWriteOp = Enums::MemWrite;
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static const OpClass FloatMemReadOp = Enums::FloatMemRead;
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static const OpClass FloatMemWriteOp = Enums::FloatMemWrite;
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static const OpClass IprAccessOp = Enums::IprAccess;
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static const OpClass InstPrefetchOp = Enums::InstPrefetch;
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static const OpClass Num_OpClasses = Enums::Num_OpClass;
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#endif // __CPU__OP_CLASS_HH__
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