Information about what kernel to load and how to load it was built into the System object and its subclasses. That overloaded the System object and made it responsible for too many things, and also was somewhat awkward when working with SE mode which doesn't have a kernel. This change extracts the kernel and information related to it from the System object and puts into into a OsKernel or Workload object. Currently the idea of a "Workload" to run and a kernel are a bit muddled, an unfortunate carry-over from the original code. It's also an implication of trying not to make too sweeping of a change, and to minimize the number of times configs need to change, ie avoiding creating a "kernel" parameter which would shortly thereafter be renamed to "workload". In future changes, the ideas of a kernel and a workload will be disentangled, and workloads will be expanded to include emulated operating systems which shephard and contain Process-es for syscall emulation. This change was originally split into pieces to make reviewing it easier. Those reviews are here: https: //gem5-review.googlesource.com/c/public/gem5/+/22243 https: //gem5-review.googlesource.com/c/public/gem5/+/24144 https: //gem5-review.googlesource.com/c/public/gem5/+/24145 https: //gem5-review.googlesource.com/c/public/gem5/+/24146 https: //gem5-review.googlesource.com/c/public/gem5/+/24147 https: //gem5-review.googlesource.com/c/public/gem5/+/24286 Change-Id: Ia3d863db276a023b6a2c7ee7a656d8142ff75589 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26466 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
246 lines
9.0 KiB
Python
246 lines
9.0 KiB
Python
# Copyright (c) 2016-2017 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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"""This script is the full system example script from the ARM
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Research Starter Kit on System Modeling. More information can be found
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at: http://www.arm.com/ResearchEnablement/SystemModeling
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"""
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from __future__ import print_function
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from __future__ import absolute_import
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import os
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import m5
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from m5.util import addToPath
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from m5.objects import *
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from m5.options import *
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import argparse
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m5.util.addToPath('../..')
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from common import SysPaths
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from common import ObjectList
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from common import MemConfig
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from common.cores.arm import HPI
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import devices
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default_dist_version = '20170616'
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default_kernel = 'vmlinux.vexpress_gem5_v1_64.' + default_dist_version
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default_disk = 'linaro-minimal-aarch64.img'
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# Pre-defined CPU configurations. Each tuple must be ordered as : (cpu_class,
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# l1_icache_class, l1_dcache_class, walk_cache_class, l2_Cache_class). Any of
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# the cache class may be 'None' if the particular cache is not present.
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cpu_types = {
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"atomic" : ( AtomicSimpleCPU, None, None, None, None),
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"minor" : (MinorCPU,
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devices.L1I, devices.L1D,
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devices.WalkCache,
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devices.L2),
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"hpi" : ( HPI.HPI,
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HPI.HPI_ICache, HPI.HPI_DCache,
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HPI.HPI_WalkCache,
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HPI.HPI_L2)
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}
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def create_cow_image(name):
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"""Helper function to create a Copy-on-Write disk image"""
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image = CowDiskImage()
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image.child.image_file = SysPaths.disk(name)
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return image;
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def create(args):
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''' Create and configure the system object. '''
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if args.script and not os.path.isfile(args.script):
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print("Error: Bootscript %s does not exist" % args.script)
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sys.exit(1)
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cpu_class = cpu_types[args.cpu][0]
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mem_mode = cpu_class.memory_mode()
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# Only simulate caches when using a timing CPU (e.g., the HPI model)
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want_caches = True if mem_mode == "timing" else False
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system = devices.simpleSystem(ArmSystem,
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want_caches,
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args.mem_size,
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mem_mode=mem_mode,
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workload=ArmFsLinux(
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object_file=
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SysPaths.binary(args.kernel)),
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readfile=args.script)
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MemConfig.config_mem(args, system)
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# Add the PCI devices we need for this system. The base system
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# doesn't have any PCI devices by default since they are assumed
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# to be added by the configurastion scripts needin them.
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system.pci_devices = [
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# Create a VirtIO block device for the system's boot
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# disk. Attach the disk image using gem5's Copy-on-Write
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# functionality to avoid writing changes to the stored copy of
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# the disk image.
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PciVirtIO(vio=VirtIOBlock(image=create_cow_image(args.disk_image))),
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]
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# Attach the PCI devices to the system. The helper method in the
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# system assigns a unique PCI bus ID to each of the devices and
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# connects them to the IO bus.
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for dev in system.pci_devices:
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system.attach_pci(dev)
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# Wire up the system's memory system
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system.connect()
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# Add CPU clusters to the system
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system.cpu_cluster = [
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devices.CpuCluster(system,
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args.num_cores,
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args.cpu_freq, "1.0V",
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*cpu_types[args.cpu]),
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]
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# Create a cache hierarchy for the cluster. We are assuming that
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# clusters have core-private L1 caches and an L2 that's shared
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# within the cluster.
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for cluster in system.cpu_cluster:
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system.addCaches(want_caches, last_cache_level=2)
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# Setup gem5's minimal Linux boot loader.
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system.realview.setupBootLoader(system, SysPaths.binary)
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if args.dtb:
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system.workload.dtb_filename = args.dtb
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else:
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# No DTB specified: autogenerate DTB
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system.workload.dtb_filename = \
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os.path.join(m5.options.outdir, 'system.dtb')
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system.generateDtb(system.workload.dtb_filename)
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# Linux boot command flags
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kernel_cmd = [
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# Tell Linux to use the simulated serial port as a console
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"console=ttyAMA0",
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# Hard-code timi
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"lpj=19988480",
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# Disable address space randomisation to get a consistent
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# memory layout.
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"norandmaps",
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# Tell Linux where to find the root disk image.
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"root=/dev/vda",
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# Mount the root disk read-write by default.
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"rw",
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# Tell Linux about the amount of physical memory present.
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"mem=%s" % args.mem_size,
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]
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system.workload.command_line = " ".join(kernel_cmd)
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return system
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def run(args):
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cptdir = m5.options.outdir
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if args.checkpoint:
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print("Checkpoint directory: %s" % cptdir)
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while True:
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event = m5.simulate()
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exit_msg = event.getCause()
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if exit_msg == "checkpoint":
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print("Dropping checkpoint at tick %d" % m5.curTick())
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cpt_dir = os.path.join(m5.options.outdir, "cpt.%d" % m5.curTick())
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m5.checkpoint(os.path.join(cpt_dir))
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print("Checkpoint done.")
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else:
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print(exit_msg, " @ ", m5.curTick())
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break
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sys.exit(event.getCode())
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def main():
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parser = argparse.ArgumentParser(epilog=__doc__)
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parser.add_argument("--dtb", type=str, default=None,
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help="DTB file to load")
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parser.add_argument("--kernel", type=str, default=default_kernel,
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help="Linux kernel")
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parser.add_argument("--disk-image", type=str,
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default=default_disk,
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help="Disk to instantiate")
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parser.add_argument("--script", type=str, default="",
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help = "Linux bootscript")
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parser.add_argument("--cpu", type=str, choices=cpu_types.keys(),
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default="atomic",
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help="CPU model to use")
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parser.add_argument("--cpu-freq", type=str, default="4GHz")
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parser.add_argument("--num-cores", type=int, default=1,
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help="Number of CPU cores")
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parser.add_argument("--mem-type", default="DDR3_1600_8x8",
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choices=ObjectList.mem_list.get_names(),
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help = "type of memory to use")
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parser.add_argument("--mem-channels", type=int, default=1,
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help = "number of memory channels")
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parser.add_argument("--mem-ranks", type=int, default=None,
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help = "number of memory ranks per channel")
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parser.add_argument("--mem-size", action="store", type=str,
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default="2GB",
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help="Specify the physical memory size")
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parser.add_argument("--checkpoint", action="store_true")
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parser.add_argument("--restore", type=str, default=None)
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args = parser.parse_args()
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root = Root(full_system=True)
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root.system = create(args)
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if args.restore is not None:
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m5.instantiate(args.restore)
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else:
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m5.instantiate()
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run(args)
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if __name__ == "__m5_main__":
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main()
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