c86f849d5a
This patch rpovides functional access support in Ruby. Currently only the M5Port of RubyPort supports functional accesses. The support for functional through the PioPort will be added as a separate patch.
339 lines
12 KiB
Plaintext
339 lines
12 KiB
Plaintext
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/*
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* Copyright (c) 1999-2005 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* $Id$
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*
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*/
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// defines
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external_type(int, primitive="yes", default="0");
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external_type(bool, primitive="yes", default="false");
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external_type(std::string, primitive="yes");
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external_type(uint64, primitive="yes");
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external_type(Time, primitive="yes", default="0");
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external_type(Address);
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structure(DataBlock, external = "yes", desc="..."){
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void clear();
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void copyPartial(DataBlock, int, int);
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}
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// Declarations of external types that are common to all protocols
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// AccessPermission
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// The following five states define the access permission of all memory blocks.
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// These permissions have multiple uses. They coordinate locking and
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// synchronization primitives, as well as enable functional accesses.
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// One should not need to add any additional permission values and it is very
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// risky to do so.
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enumeration(AccessPermission, desc="...", default="AccessPermission_NotPresent") {
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// Valid data
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Read_Only, desc="block is Read Only (modulo functional writes)";
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Read_Write, desc="block is Read/Write";
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// Possibly Invalid data
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// The maybe stale permission indicates that accordingly to the protocol,
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// there is no guarantee the block contains valid data. However, functional
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// writes should update the block because a dataless PUT request may
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// revalidate the block's data.
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Maybe_Stale, desc="block can be stale or revalidated by a dataless PUT";
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// Invalid data
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Invalid, desc="block is in an Invalid base state";
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NotPresent, desc="block is NotPresent";
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Busy, desc="block is in a transient state, currently invalid";
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}
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// TesterStatus
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enumeration(TesterStatus, desc="...") {
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Idle, desc="Idle";
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Action_Pending, desc="Action Pending";
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Ready, desc="Ready";
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Check_Pending, desc="Check Pending";
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}
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// InvalidateGeneratorStatus
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enumeration(InvalidateGeneratorStatus, desc="...") {
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Load_Waiting, desc="Load waiting to be issued";
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Load_Pending, desc="Load issued";
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Inv_Waiting, desc="Store (invalidate) waiting to be issued";
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Inv_Pending, desc="Store (invalidate) issued";
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}
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// SeriesRequestGeneratorStatus
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enumeration(SeriesRequestGeneratorStatus, desc="...") {
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Thinking, desc="Doing work before next action";
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Request_Pending, desc="Request pending";
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}
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// LockStatus
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enumeration(LockStatus, desc="...") {
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Unlocked, desc="Lock is not held";
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Locked, desc="Lock is held";
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}
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// SequencerStatus
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enumeration(SequencerStatus, desc="...") {
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Idle, desc="Idle";
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Pending, desc="Pending";
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}
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enumeration(TransitionResult, desc="...") {
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Valid, desc="Valid transition";
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ResourceStall, desc="Stalled due to insufficient resources";
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ProtocolStall, desc="Protocol specified stall";
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}
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// RubyRequestType
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enumeration(RubyRequestType, desc="...", default="RubyRequestType_NULL") {
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LD, desc="Load";
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ST, desc="Store";
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ATOMIC, desc="Atomic Load/Store";
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IFETCH, desc="Instruction fetch";
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IO, desc="I/O";
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REPLACEMENT, desc="Replacement";
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Load_Linked, desc="";
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Store_Conditional, desc="";
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RMW_Read, desc="";
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RMW_Write, desc="";
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Locked_RMW_Read, desc="";
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Locked_RMW_Write, desc="";
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COMMIT, desc="Commit version";
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NULL, desc="Invalid request type";
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FLUSH, desc="Flush request type";
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}
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enumeration(SequencerRequestType, desc="...", default="SequencerRequestType_NULL") {
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LD, desc="Load";
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ST, desc="Store";
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NULL, desc="Invalid request type";
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}
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enumeration(GenericRequestType, desc="...", default="GenericRequestType_NULL") {
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GETS, desc="gets request";
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GET_INSTR, desc="get instr request";
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GETX, desc="getx request";
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UPGRADE, desc="upgrade request";
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DOWNGRADE, desc="downgrade request";
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INV, desc="invalidate request";
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INV_S, desc="invalidate shared copy request";
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PUTS, desc="puts request";
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PUTO, desc="puto request";
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PUTX, desc="putx request";
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L2_PF, desc="L2 prefetch";
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LD, desc="Load";
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ST, desc="Store";
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ATOMIC, desc="Atomic Load/Store";
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IFETCH, desc="Instruction fetch";
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IO, desc="I/O";
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NACK, desc="Nack";
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REPLACEMENT, desc="Replacement";
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WB_ACK, desc="WriteBack ack";
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EXE_ACK, desc="Execlusive ack";
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COMMIT, desc="Commit version";
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LD_XACT, desc="Transactional Load";
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LDX_XACT, desc="Transactional Load-Intend-Modify";
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ST_XACT, desc="Transactional Store";
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BEGIN_XACT, desc="Begin Transaction";
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COMMIT_XACT, desc="Commit Transaction";
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ABORT_XACT, desc="Abort Transaction";
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DMA_READ, desc="DMA READ";
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DMA_WRITE, desc="DMA WRITE";
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NULL, desc="null request type";
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}
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enumeration(GenericMachineType, desc="...", default="GenericMachineType_NULL") {
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L1Cache, desc="L1 Cache Mach";
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L2Cache, desc="L2 Cache Mach";
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L3Cache, desc="L3 Cache Mach";
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Directory, desc="Directory Mach";
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Collector, desc="Collector Mach";
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L1Cache_wCC, desc="L1 Cache Mach with Cache Coherence (used for miss latency profile)";
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L2Cache_wCC, desc="L1 Cache Mach with Cache Coherence (used for miss latency profile)";
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NULL, desc="null mach type";
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}
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// MessageSizeType
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enumeration(MessageSizeType, default="MessageSizeType_Undefined", desc="...") {
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Undefined, desc="Undefined";
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Control, desc="Control Message";
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Data, desc="Data Message";
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Request_Control, desc="Request";
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Reissue_Control, desc="Reissued request";
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Response_Data, desc="data response";
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ResponseL2hit_Data, desc="data response";
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ResponseLocal_Data, desc="data response";
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Response_Control, desc="non-data response";
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Writeback_Data, desc="Writeback data";
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Writeback_Control, desc="Writeback control";
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Broadcast_Control, desc="Broadcast control";
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Multicast_Control, desc="Multicast control";
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Forwarded_Control, desc="Forwarded control";
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Invalidate_Control, desc="Invalidate control";
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Unblock_Control, desc="Unblock control";
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Persistent_Control, desc="Persistent request activation messages";
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Completion_Control, desc="Completion messages";
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}
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// AccessType
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enumeration(AccessType, desc="...") {
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Read, desc="Reading from cache";
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Write, desc="Writing to cache";
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}
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// RubyAccessMode
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enumeration(RubyAccessMode, default="RubyAccessMode_User", desc="...") {
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Supervisor, desc="Supervisor mode";
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User, desc="User mode";
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Device, desc="Device mode";
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}
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enumeration(PrefetchBit, default="PrefetchBit_No", desc="...") {
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No, desc="No, not a prefetch";
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Yes, desc="Yes, a prefetch";
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L1_HW, desc="This is a L1 hardware prefetch";
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L2_HW, desc="This is a L2 hardware prefetch";
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}
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// CacheMsg
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structure(SequencerMsg, desc="...", interface="Message") {
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Address LineAddress, desc="Line address for this request";
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Address PhysicalAddress, desc="Physical address for this request";
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SequencerRequestType Type, desc="Type of request (LD, ST, etc)";
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Address ProgramCounter, desc="Program counter of the instruction that caused the miss";
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RubyAccessMode AccessMode, desc="user/supervisor access type";
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DataBlock DataBlk, desc="Data";
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int Len, desc="size in bytes of access";
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PrefetchBit Prefetch, desc="Is this a prefetch request";
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}
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// MaskPredictorType
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enumeration(MaskPredictorType, "MaskPredictorType_Undefined", desc="...") {
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Undefined, desc="Undefined";
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AlwaysUnicast, desc="AlwaysUnicast";
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TokenD, desc="TokenD";
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AlwaysBroadcast, desc="AlwaysBroadcast";
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TokenB, desc="TokenB";
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TokenNull, desc="TokenNull";
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Random, desc="Random";
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Pairwise, desc="Pairwise";
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Owner, desc="Owner";
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BroadcastIfShared, desc="Broadcast-If-Shared";
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BroadcastCounter, desc="Broadcast Counter";
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Group, desc="Group";
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Counter, desc="Counter";
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StickySpatial, desc="StickySpatial";
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OwnerBroadcast, desc="Owner/Broadcast Hybrid";
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OwnerGroup, desc="Owner/Group Hybrid";
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OwnerBroadcastMod, desc="Owner/Broadcast Hybrid-Mod";
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OwnerGroupMod, desc="Owner/Group Hybrid-Mod";
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LastNMasks, desc="Last N Masks";
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BandwidthAdaptive, desc="Bandwidth Adaptive";
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}
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// MaskPredictorIndex
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enumeration(MaskPredictorIndex, "MaskPredictorIndex_Undefined", desc="...") {
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Undefined, desc="Undefined";
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DataBlock, desc="Data Block";
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PC, desc="Program Counter";
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}
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// MaskPredictorTraining
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enumeration(MaskPredictorTraining, "MaskPredictorTraining_Undefined", desc="...") {
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Undefined, desc="Undefined";
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None, desc="None";
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Implicit, desc="Implicit";
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Explicit, desc="Explicit";
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Both, desc="Both";
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}
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// Network Topologies
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enumeration(TopologyType, desc="...") {
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CROSSBAR, desc="One node per chip, single switch crossbar";
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HIERARCHICAL_SWITCH, desc="One node per chip, totally ordered hierarchical tree switched network";
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TORUS_2D, desc="One node per chip, 2D torus";
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PT_TO_PT, desc="One node per chip, Point to Point Network";
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FILE_SPECIFIED, desc="described by the file NETWORK_FILE";
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}
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// DNUCA AllocationStrategy
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enumeration(AllocationStrategy, desc="...") {
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InMiddle, desc="";
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InInvCorners, desc="";
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InSharedSides, desc="";
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StaticDist, desc="";
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RandomBank, desc="";
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FrequencyBank, desc="";
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FrequencyBlock, desc="";
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LRUBlock, desc="";
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}
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// DNUCA SearchMechanism
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enumeration(SearchMechanism, desc="...") {
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Perfect, desc="";
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PartialTag, desc="";
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BloomFilter, desc="";
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Random, desc="";
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None, desc="";
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}
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// DNUCA link type
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enumeration(LinkType, desc="...") {
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RC_1500UM, desc="";
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RC_2500UM, desc="";
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TL_9000UM, desc="";
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TL_11000UM, desc="";
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TL_13000UM, desc="";
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NO_ENERGY, desc="";
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NULL, desc="";
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}
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// transient request type
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enumeration(TransientRequestType, desc="...", default="TransientRequestType_Undefined") {
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Undefined, desc="";
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OffChip, desc="";
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OnChip, desc="";
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LocalTransient, desc="";
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}
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// Request Status
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enumeration(RequestStatus, desc="...", default="RequestStatus_NULL") {
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Ready, desc="The sequencer is ready and the request does not alias";
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Issued, desc="The sequencer successfully issued the request";
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BufferFull, desc="Can not issue because the sequencer is full";
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Aliased, desc="This request aliased with a currently outstanding request";
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NULL, desc="";
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}
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// LinkDirection
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enumeration(LinkDirection, desc="...") {
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In, desc="Inward link direction";
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Out, desc="Outward link direction";
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}
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