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c73c19effd8f7f9b6e2ec470f04b8f1f43ce7354
gem5/src/cpu/minor
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Gabe Black c73c19effd cpu: Make accesses to comInstEventQueue indirect through methods. 
This lets us move the event queue itself around, or change how those
services are provided.

Change-Id: Ie36665b353cf9788968f253cf281a854a6eff4f4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22107
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-25 22:42:31 +00:00
..
activity.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
activity.hh
cpu: `Minor' in-order CPU model
2014-07-23 16:09:04 -05:00
buffers.hh
base, sim: Add missing destructors
2018-12-04 10:02:29 +00:00
cpu.cc
cpu: Make get(Data|Inst)Port return a Port and not a MasterPort.
2019-08-28 08:25:51 +00:00
cpu.hh
cpu: Make get(Data|Inst)Port return a Port and not a MasterPort.
2019-08-28 08:25:51 +00:00
decode.cc
Revert "cpu: stop scheduling suspended threads in MinorCPU"
2019-05-14 08:44:37 +00:00
decode.hh
cpu: Add SMT support to MinorCPU
2016-07-21 17:19:16 +01:00
dyn_inst.cc
cpu: Add first-/non-faulting load support to Minor and O3
2019-07-27 20:51:31 +00:00
dyn_inst.hh
cpu: Add first-/non-faulting load support to Minor and O3
2019-07-27 20:51:31 +00:00
exec_context.hh
cpu, mem: Changing AtomicOpFunctor* for unique_ptr<AtomicOpFunctor>
2019-09-23 12:32:08 +00:00
execute.cc
cpu: Make accesses to comInstEventQueue indirect through methods.
2019-10-25 22:42:31 +00:00
execute.hh
cpu: Add SMT support to MinorCPU
2016-07-21 17:19:16 +01:00
fetch1.cc
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
fetch1.hh
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
fetch2.cc
Revert "cpu: fix how a thread starts up in MinorCPU"
2019-05-14 08:44:37 +00:00
fetch2.hh
Revert "cpu: fix how a thread starts up in MinorCPU"
2019-05-14 08:44:37 +00:00
func_unit.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
func_unit.hh
arch: Use const StaticInstPtr references where possible
2014-09-27 09:08:36 -04:00
lsq.cc
cpu, mem: Changing AtomicOpFunctor* for unique_ptr<AtomicOpFunctor>
2019-09-23 12:32:08 +00:00
lsq.hh
cpu, mem: Changing AtomicOpFunctor* for unique_ptr<AtomicOpFunctor>
2019-09-23 12:32:08 +00:00
MinorCPU.py
arch-arm,cpu: Add initial support for Arm SVE
2019-03-14 10:42:27 +00:00
pipe_data.cc
cpu: Add SMT support to MinorCPU
2016-07-21 17:19:16 +01:00
pipe_data.hh
cpu: Add SMT support to MinorCPU
2016-07-21 17:19:16 +01:00
pipeline.cc
Revert "cpu: fix how a thread starts up in MinorCPU"
2019-05-14 08:44:37 +00:00
pipeline.hh
cpu-minor: Add missing instruction stats
2017-11-29 10:00:40 +00:00
SConscript
cpu: `Minor' in-order CPU model
2014-07-23 16:09:04 -05:00
SConsopts
arch, cpu: Factor out the ExecContext into a proper base class
2014-09-03 07:42:22 -04:00
scoreboard.cc
arch,cpu: Add vector predicate registers
2019-01-30 16:57:54 +00:00
scoreboard.hh
arch,cpu: Add vector predicate registers
2019-01-30 16:57:54 +00:00
stats.cc
cpu: Add instruction opclass histogram to minor
2016-04-05 08:08:12 -05:00
stats.hh
cpu: Add instruction opclass histogram to minor
2016-04-05 08:08:12 -05:00
trace.hh
cpu: `Minor' in-order CPU model
2014-07-23 16:09:04 -05:00