Files
gem5/src/arch/power/faults.cc
Gabe Black 8279191cd9 misc,cpu: Make ThreadContext work with PCStateBase-s.
Change-Id: I92f1d79c697bb45f610604c9e84b24ea93d58776
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52058
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-11-30 23:30:06 +00:00

68 lines
2.4 KiB
C++

/*
* Copyright (c) 2021 IBM Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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*/
#include "arch/power/faults.hh"
#include <csignal>
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
namespace gem5
{
namespace PowerISA
{
void
UnimplementedOpcodeFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
panic_if(tc->getSystemPtr()->trapToGdb(SIGILL, tc->contextId()),
"Unimplemented opcode encountered at virtual address %#x\n",
tc->pcState().instAddr());
}
void
AlignmentFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
panic_if(!tc->getSystemPtr()->trapToGdb(SIGBUS, tc->contextId()),
"Alignment fault when accessing virtual address %#x\n", vaddr);
}
void
TrapFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
panic_if(tc->getSystemPtr()->trapToGdb(SIGTRAP, tc->contextId()),
"Trap encountered at virtual address %#x\n",
tc->pcState().instAddr());
}
} // namespace PowerISA
} // namespace gem5