Gabe Black 563e19d1fd arch: cpu: Make the ExtMachInst type a template argument in InstMap. ...

This doesn't completely hide the ISA specific ExtMachInst type inside
the ISAs since it still gets applied in arch/generic, but it at least
pulls it into the arch directory.

Change-Id: Ic2188d59696530d7ecafdff0785d71867182701d
Reviewed-on: https://gem5-review.googlesource.com/9403
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

2018-03-27 10:57:54 +00:00

..

freebsd

arch, base, dev, kern, sym: FreeBSD support

2015-04-29 22:35:23 -05:00

linux

arm,sim: fix context switch stats dumps for ARM64/Linux

2017-06-22 13:32:04 +00:00

BaseTLB.py

sim: Move the BaseTLB to src/arch/generic/

2015-02-11 10:23:27 -05:00

debugfaults.hh

misc: Rename misc.(hh|cc) to logging.(hh|cc)

2017-12-04 23:10:55 +00:00

decode_cache.cc

arch: cpu: Make the ExtMachInst type a template argument in InstMap.

2018-03-27 10:57:54 +00:00

decode_cache.hh

arch: cpu: Make the ExtMachInst type a template argument in InstMap.

2018-03-27 10:57:54 +00:00

ISACommon.py

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

locked_mem.hh

mem: Signal the local monitor when clearing the global monitor

2017-10-13 08:41:08 +00:00

memhelpers.hh

arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64)_t types with.

2017-12-13 23:51:59 +00:00

mmapped_ipr.cc

style: [patch 1/22] use /r/3648/ to reorganize includes

2016-11-09 14:27:37 -06:00

mmapped_ipr.hh

mem: Use a flag instead of address bit 63 for generic IPRs

2013-10-15 13:24:35 +02:00

pseudo_inst.cc

misc: Rename misc.(hh|cc) to logging.(hh|cc)

2017-12-04 23:10:55 +00:00

pseudo_inst.hh

kvm, x86: Adding support for SE mode execution

2014-11-23 18:01:08 -08:00

SConscript

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

tlb.cc

style: fix missing spaces in control statements

2016-02-06 17:21:19 -08:00

tlb.hh

arch,cpu: "virtualize" the TLB interface.

2017-12-22 23:16:03 +00:00

traits.hh

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

types.hh

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

vec_reg.hh

misc: Rename misc.(hh|cc) to logging.(hh|cc)

2017-12-04 23:10:55 +00:00