c10feed524
This commit changes metric units (e.g. kB, MB, and GB) to binary units (KiB, MiB, GiB) in various files. This PR covers files that were missed by a previous PR that also made these changes.
80 lines
3.1 KiB
Python
Executable File
80 lines
3.1 KiB
Python
Executable File
# Copyright (c) 2022, Fraunhofer IESE
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met:
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#
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# 1. Redistributions of source code must retain the above copyright notice,
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# this list of conditions and the following disclaimer.
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#
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# 3. Neither the name of the copyright holder nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
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# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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import os
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import m5
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from m5.objects import *
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# Create a config to be used by the traffic generator
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cfg_file_name = "memcheck.cfg"
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cfg_file_path = os.path.dirname(__file__) + "/" + cfg_file_name
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cfg_file = open(cfg_file_path, "w")
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# Three states, with random, linear and idle behaviours. The random
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# and linear states access memory in the range [0 : 16 Mbyte] with 8
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# byte and 64 byte accesses respectively.
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cfg_file.write("STATE 0 10000000 RANDOM 65 0 16777216 8 50000 150000 0\n")
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cfg_file.write("STATE 1 10000000 LINEAR 65 0 16777216 64 50000 150000 0\n")
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cfg_file.write("STATE 2 10000000 IDLE\n")
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cfg_file.write("INIT 0\n")
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cfg_file.write("TRANSITION 0 1 0.5\n")
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cfg_file.write("TRANSITION 0 2 0.5\n")
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cfg_file.write("TRANSITION 1 0 0.5\n")
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cfg_file.write("TRANSITION 1 2 0.5\n")
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cfg_file.write("TRANSITION 2 0 0.5\n")
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cfg_file.write("TRANSITION 2 1 0.5\n")
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cfg_file.close()
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system = System()
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vd = VoltageDomain(voltage="1V")
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system.mem_mode = "timing"
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system.cpu = TrafficGen(config_file=cfg_file_path)
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system.target = TLM_Target()
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system.physmem = (
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SimpleMemory()
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) # This must be instanciated, even if not needed
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# system.mem.addr_ranges = [AddrRange('512MiB')]
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system.transactor = Gem5ToTlmBridge32()
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system.clk_domain = SrcClockDomain(clock="1.5GHz", voltage_domain=vd)
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# Connect everything:
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system.transactor.gem5 = system.cpu.port
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system.transactor.tlm = system.target.tlm
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kernel = SystemC_Kernel(system=system)
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root = Root(full_system=False, systemc_kernel=kernel)
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m5.instantiate(None)
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cause = m5.simulate(m5.MaxTick).getCause()
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print(cause)
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