Anouk Van Laer c0d613adb4 pwr: Adds logic to enter power gating for the cpu model ...

If the CPU has been clock gated for a sufficient amount of time
(configurable via pwrGatingLatency), the CPU will go into the OFF
power state.  This does not model hardware, just behaviour.

Change-Id: Ib3681d1ffa6ad25eba60f47b4020325f63472d43
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/3969
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

2017-11-20 11:03:03 +00:00

..

arch

sparc: Pull StaticInst base classes out of the ISA description.

2017-11-20 07:49:48 +00:00

base

arm: Add support for armv8 CRC32 instructions

2017-11-15 14:11:44 +00:00

cpu

pwr: Adds logic to enter power gating for the cpu model

2017-11-20 11:03:03 +00:00

dev

dev: Fix the SPARC and X86 platform devices.

2017-11-20 00:15:28 +00:00

doc

sim: Adding support for power models

2016-06-06 17:16:44 +01:00

doxygen

MEM: Put memory system document into doxygen

2012-09-25 11:49:41 -05:00

gpu-compute

gpu-compute: Refactor some Event subclasses to lambdas

2017-07-12 20:07:05 +00:00

kern

stats: Move the swpipl function into the Alpha kernel stats.

2017-09-11 04:59:01 +00:00

mem

ext, mem: Pull DRAMPower SHA 90d6290 and rebase

2017-11-16 16:39:19 +00:00

proto

mem: Add a "map" of packet IDs to strings in probe traces.

2017-09-25 21:13:49 +00:00

python

config: Add an Energy param type.

2017-11-13 17:13:09 +00:00

sim

sim: Implement load_addr_mask auto-calculation

2017-11-17 10:54:24 +00:00

unittest

tests: Fix compilation of cprinftest.

2017-11-19 23:31:52 +00:00

Doxyfile

Doxygen: Update the version of the Doxyfile

2012-10-11 06:38:42 -04:00

SConscript

scons: Move Transform and termcap functionality into their own files.

2017-11-10 13:17:29 +00:00