Change-Id: I85839880db588b3b92064b8fcbf053c1811a1fdc Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52080 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Maintainer: Gabe Black <gabe.black@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
162 lines
5.4 KiB
C++
162 lines
5.4 KiB
C++
/*
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* Copyright 2020 Google, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_GENERIC_DECODER_HH__
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#define __ARCH_GENERIC_DECODER_HH__
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#include "arch/generic/pcstate.hh"
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#include "base/bitfield.hh"
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#include "base/intmath.hh"
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#include "base/types.hh"
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#include "cpu/static_inst_fwd.hh"
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#include "params/InstDecoder.hh"
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#include "sim/sim_object.hh"
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namespace gem5
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{
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class InstDecoder : public SimObject
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{
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protected:
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void *_moreBytesPtr;
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size_t _moreBytesSize;
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Addr _pcMask;
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bool instDone = false;
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bool outOfBytes = true;
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public:
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template <typename MoreBytesType>
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InstDecoder(const InstDecoderParams ¶ms, MoreBytesType *mb_buf) :
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SimObject(params), _moreBytesPtr(mb_buf),
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_moreBytesSize(sizeof(MoreBytesType)),
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_pcMask(~mask(floorLog2(_moreBytesSize)))
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{}
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virtual StaticInstPtr fetchRomMicroop(
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MicroPC micropc, StaticInstPtr curMacroop);
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virtual void
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reset()
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{
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instDone = false;
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outOfBytes = true;
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}
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template <class Type>
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Type &
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as()
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{
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return *static_cast<Type *>(this);
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}
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template <class Type>
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const Type &
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as() const
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{
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return *static_cast<const Type *>(this);
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}
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/**
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* Take over the state from an old decoder when switching CPUs.
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*
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* @param old Decoder used in old CPU
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*/
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virtual void
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takeOverFrom(InstDecoder *old)
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{
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instDone = old->instDone;
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outOfBytes = old->outOfBytes;
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}
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void *moreBytesPtr() const { return _moreBytesPtr; }
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size_t moreBytesSize() const { return _moreBytesSize; }
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Addr pcMask() const { return _pcMask; }
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/**
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* Is an instruction ready to be decoded?
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*
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* CPU models call this method to determine if decode() will
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* return a new instruction on the next call. It typically only
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* returns false if the decoder hasn't received enough data to
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* decode a full instruction.
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*/
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bool instReady() const { return instDone; }
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/**
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* Can the decoder accept more data?
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*
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* A CPU model uses this method to determine if the decoder can
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* accept more data. Note that an instruction can be ready (see
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* instReady() even if this method returns true.
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*/
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bool needMoreBytes() const { return outOfBytes; }
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/**
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* Feed data to the decoder.
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*
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* A CPU model uses this interface to load instruction data into
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* the decoder. Once enough data has been loaded (check with
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* instReady()), a decoded instruction can be retrieved using
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* decode(PCStateBase &).
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*
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* This method is intended to support both fixed-length and
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* variable-length instructions. Instruction data is fetch in
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* MachInst blocks (which correspond to the size of a typical
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* insturction). The method might need to be called multiple times
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* if the instruction spans multiple blocks, in that case
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* needMoreBytes() will return true and instReady() will return
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* false.
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*
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* The fetchPC parameter is used to indicate where in memory the
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* instruction was fetched from. This is should be the same
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* address as the pc. If fetching multiple blocks, it indicates
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* where subsequent blocks are fetched from (pc + n *
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* sizeof(MachInst)).
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*
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* @param pc Instruction pointer that we are decoding.
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* @param fetchPC The address this chunk was fetched from.
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*/
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virtual void moreBytes(const PCStateBase &pc, Addr fetchPC) = 0;
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/**
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* Decode an instruction or fetch it from the code cache.
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*
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* This method decodes the currently pending pre-decoded
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* instruction. Data must be fed to the decoder using moreBytes()
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* until instReady() is true before calling this method.
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*
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* @param pc Instruction pointer that we are decoding.
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* @return A pointer to a static instruction or NULL if the
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* decoder isn't ready (see instReady()).
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*/
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virtual StaticInstPtr decode(PCStateBase &pc) = 0;
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};
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} // namespace gem5
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#endif // __ARCH_DECODER_GENERIC_HH__
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