e8381142b0
Previously, nextCycle() could return the *current* cycle if the current tick was already aligned with the clock edge. This behavior is not only confusing (not quite what the function name implies), but also caused problems in the drainResume() function. When exiting/re-entering the sim loop (e.g., to take checkpoints), the CPUs will drain and resume. Due to the previous behavior of nextCycle(), the CPU tick events were being rescheduled in the same ticks that were already processed before draining. This caused divergence from runs that did not exit/re-entered the sim loop. (Initially a cycle difference, but a significant impact later on.) This patch separates out the two behaviors (nextCycle() and clockEdge()), uses nextCycle() in drainResume, and uses clockEdge() everywhere else. Nothing (other than name) should change except for the drainResume timing.
758 lines
22 KiB
C++
758 lines
22 KiB
C++
/*
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* Copyright (c) 2010-2012 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: William Wang
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* Ali Saidi
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*/
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#include "base/vnc/vncinput.hh"
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#include "base/bitmap.hh"
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#include "base/output.hh"
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#include "base/trace.hh"
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#include "debug/PL111.hh"
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#include "debug/Uart.hh"
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#include "dev/arm/amba_device.hh"
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#include "dev/arm/base_gic.hh"
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#include "dev/arm/pl111.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/system.hh"
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// clang complains about std::set being overloaded with Packet::set if
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// we open up the entire namespace std
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using std::vector;
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using namespace AmbaDev;
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// initialize clcd registers
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Pl111::Pl111(const Params *p)
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: AmbaDmaDevice(p), lcdTiming0(0), lcdTiming1(0), lcdTiming2(0),
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lcdTiming3(0), lcdUpbase(0), lcdLpbase(0), lcdControl(0), lcdImsc(0),
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lcdRis(0), lcdMis(0),
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clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0),
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clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0),
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clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0),
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pixelClock(p->pixel_clock), vnc(p->vnc), bmp(NULL), pic(NULL),
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width(LcdMaxWidth), height(LcdMaxHeight),
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bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0),
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waterMark(0), dmaPendingNum(0), readEvent(this), fillFifoEvent(this),
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dmaDoneEventAll(maxOutstandingDma, this),
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dmaDoneEventFree(maxOutstandingDma),
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intEvent(this)
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{
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pioSize = 0xFFFF;
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dmaBuffer = new uint8_t[buffer_size];
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memset(lcdPalette, 0, sizeof(lcdPalette));
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memset(cursorImage, 0, sizeof(cursorImage));
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memset(dmaBuffer, 0, buffer_size);
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for (int i = 0; i < maxOutstandingDma; ++i)
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dmaDoneEventFree[i] = &dmaDoneEventAll[i];
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if (vnc)
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vnc->setFramebufferAddr(dmaBuffer);
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}
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Pl111::~Pl111()
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{
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delete[] dmaBuffer;
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}
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// read registers and frame buffer
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Tick
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Pl111::read(PacketPtr pkt)
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{
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// use a temporary data since the LCD registers are read/written with
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// different size operations
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uint32_t data = 0;
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assert(pkt->getAddr() >= pioAddr &&
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pkt->getAddr() < pioAddr + pioSize);
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Addr daddr = pkt->getAddr() - pioAddr;
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pkt->allocate();
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DPRINTF(PL111, " read register %#x size=%d\n", daddr, pkt->getSize());
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switch (daddr) {
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case LcdTiming0:
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data = lcdTiming0;
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break;
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case LcdTiming1:
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data = lcdTiming1;
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break;
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case LcdTiming2:
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data = lcdTiming2;
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break;
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case LcdTiming3:
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data = lcdTiming3;
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break;
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case LcdUpBase:
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data = lcdUpbase;
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break;
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case LcdLpBase:
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data = lcdLpbase;
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break;
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case LcdControl:
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data = lcdControl;
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break;
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case LcdImsc:
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data = lcdImsc;
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break;
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case LcdRis:
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data = lcdRis;
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break;
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case LcdMis:
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data = lcdMis;
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break;
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case LcdIcr:
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panic("LCD register at offset %#x is Write-Only\n", daddr);
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break;
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case LcdUpCurr:
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data = curAddr;
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break;
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case LcdLpCurr:
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data = curAddr;
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break;
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case ClcdCrsrCtrl:
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data = clcdCrsrCtrl;
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break;
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case ClcdCrsrConfig:
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data = clcdCrsrConfig;
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break;
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case ClcdCrsrPalette0:
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data = clcdCrsrPalette0;
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break;
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case ClcdCrsrPalette1:
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data = clcdCrsrPalette1;
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break;
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case ClcdCrsrXY:
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data = clcdCrsrXY;
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break;
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case ClcdCrsrClip:
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data = clcdCrsrClip;
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break;
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case ClcdCrsrImsc:
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data = clcdCrsrImsc;
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break;
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case ClcdCrsrIcr:
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panic("CLCD register at offset %#x is Write-Only\n", daddr);
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break;
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case ClcdCrsrRis:
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data = clcdCrsrRis;
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break;
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case ClcdCrsrMis:
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data = clcdCrsrMis;
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break;
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default:
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if (AmbaDev::readId(pkt, AMBA_ID, pioAddr)) {
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// Hack for variable size accesses
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data = pkt->get<uint32_t>();
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break;
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} else if (daddr >= CrsrImage && daddr <= 0xBFC) {
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// CURSOR IMAGE
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int index;
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index = (daddr - CrsrImage) >> 2;
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data= cursorImage[index];
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break;
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} else if (daddr >= LcdPalette && daddr <= 0x3FC) {
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// LCD Palette
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int index;
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index = (daddr - LcdPalette) >> 2;
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data = lcdPalette[index];
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break;
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} else {
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panic("Tried to read CLCD register at offset %#x that \
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doesn't exist\n", daddr);
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break;
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}
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}
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switch(pkt->getSize()) {
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case 1:
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pkt->set<uint8_t>(data);
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break;
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case 2:
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pkt->set<uint16_t>(data);
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break;
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case 4:
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pkt->set<uint32_t>(data);
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break;
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default:
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panic("CLCD controller read size too big?\n");
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break;
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}
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pkt->makeAtomicResponse();
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return pioDelay;
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}
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// write registers and frame buffer
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Tick
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Pl111::write(PacketPtr pkt)
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{
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// use a temporary data since the LCD registers are read/written with
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// different size operations
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//
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uint32_t data = 0;
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switch(pkt->getSize()) {
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case 1:
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data = pkt->get<uint8_t>();
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break;
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case 2:
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data = pkt->get<uint16_t>();
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break;
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case 4:
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data = pkt->get<uint32_t>();
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break;
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default:
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panic("PL111 CLCD controller write size too big?\n");
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break;
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}
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assert(pkt->getAddr() >= pioAddr &&
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pkt->getAddr() < pioAddr + pioSize);
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Addr daddr = pkt->getAddr() - pioAddr;
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DPRINTF(PL111, " write register %#x value %#x size=%d\n", daddr,
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pkt->get<uint8_t>(), pkt->getSize());
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switch (daddr) {
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case LcdTiming0:
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lcdTiming0 = data;
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// width = 16 * (PPL+1)
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width = (lcdTiming0.ppl + 1) << 4;
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break;
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case LcdTiming1:
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lcdTiming1 = data;
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// height = LPP + 1
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height = (lcdTiming1.lpp) + 1;
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break;
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case LcdTiming2:
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lcdTiming2 = data;
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break;
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case LcdTiming3:
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lcdTiming3 = data;
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break;
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case LcdUpBase:
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lcdUpbase = data;
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DPRINTF(PL111, "####### Upper panel base set to: %#x #######\n", lcdUpbase);
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break;
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case LcdLpBase:
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warn_once("LCD dual screen mode not supported\n");
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lcdLpbase = data;
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DPRINTF(PL111, "###### Lower panel base set to: %#x #######\n", lcdLpbase);
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break;
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case LcdControl:
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int old_lcdpwr;
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old_lcdpwr = lcdControl.lcdpwr;
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lcdControl = data;
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DPRINTF(PL111, "LCD power is:%d\n", lcdControl.lcdpwr);
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// LCD power enable
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if (lcdControl.lcdpwr && !old_lcdpwr) {
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updateVideoParams();
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DPRINTF(PL111, " lcd size: height %d width %d\n", height, width);
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waterMark = lcdControl.watermark ? 8 : 4;
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startDma();
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}
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break;
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case LcdImsc:
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lcdImsc = data;
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if (lcdImsc.vcomp)
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panic("Interrupting on vcomp not supported\n");
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lcdMis = lcdImsc & lcdRis;
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if (!lcdMis)
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gic->clearInt(intNum);
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break;
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case LcdRis:
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panic("LCD register at offset %#x is Read-Only\n", daddr);
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break;
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case LcdMis:
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panic("LCD register at offset %#x is Read-Only\n", daddr);
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break;
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case LcdIcr:
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lcdRis = lcdRis & ~data;
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lcdMis = lcdImsc & lcdRis;
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if (!lcdMis)
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gic->clearInt(intNum);
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break;
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case LcdUpCurr:
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panic("LCD register at offset %#x is Read-Only\n", daddr);
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break;
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case LcdLpCurr:
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panic("LCD register at offset %#x is Read-Only\n", daddr);
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break;
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case ClcdCrsrCtrl:
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clcdCrsrCtrl = data;
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break;
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case ClcdCrsrConfig:
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clcdCrsrConfig = data;
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break;
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case ClcdCrsrPalette0:
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clcdCrsrPalette0 = data;
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break;
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case ClcdCrsrPalette1:
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clcdCrsrPalette1 = data;
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break;
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case ClcdCrsrXY:
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clcdCrsrXY = data;
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break;
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case ClcdCrsrClip:
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clcdCrsrClip = data;
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break;
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case ClcdCrsrImsc:
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clcdCrsrImsc = data;
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break;
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case ClcdCrsrIcr:
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clcdCrsrIcr = data;
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break;
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case ClcdCrsrRis:
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panic("CLCD register at offset %#x is Read-Only\n", daddr);
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break;
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case ClcdCrsrMis:
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panic("CLCD register at offset %#x is Read-Only\n", daddr);
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break;
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default:
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if (daddr >= CrsrImage && daddr <= 0xBFC) {
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// CURSOR IMAGE
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int index;
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index = (daddr - CrsrImage) >> 2;
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cursorImage[index] = data;
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break;
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} else if (daddr >= LcdPalette && daddr <= 0x3FC) {
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// LCD Palette
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int index;
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index = (daddr - LcdPalette) >> 2;
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lcdPalette[index] = data;
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break;
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} else {
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panic("Tried to write PL111 register at offset %#x that \
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doesn't exist\n", daddr);
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break;
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}
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}
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pkt->makeAtomicResponse();
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return pioDelay;
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}
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void
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Pl111::updateVideoParams()
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{
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if (lcdControl.lcdbpp == bpp24) {
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bytesPerPixel = 4;
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} else if (lcdControl.lcdbpp == bpp16m565) {
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bytesPerPixel = 2;
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}
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if (vnc) {
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if (lcdControl.lcdbpp == bpp24 && lcdControl.bgr)
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vnc->setFrameBufferParams(VideoConvert::bgr8888, width,
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height);
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else if (lcdControl.lcdbpp == bpp24 && !lcdControl.bgr)
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vnc->setFrameBufferParams(VideoConvert::rgb8888, width,
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height);
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else if (lcdControl.lcdbpp == bpp16m565 && lcdControl.bgr)
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vnc->setFrameBufferParams(VideoConvert::bgr565, width,
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height);
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else if (lcdControl.lcdbpp == bpp16m565 && !lcdControl.bgr)
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vnc->setFrameBufferParams(VideoConvert::rgb565, width,
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height);
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else
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panic("Unimplemented video mode\n");
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}
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if (bmp)
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delete bmp;
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if (lcdControl.lcdbpp == bpp24 && lcdControl.bgr)
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bmp = new Bitmap(VideoConvert::bgr8888, width, height, dmaBuffer);
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else if (lcdControl.lcdbpp == bpp24 && !lcdControl.bgr)
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bmp = new Bitmap(VideoConvert::rgb8888, width, height, dmaBuffer);
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else if (lcdControl.lcdbpp == bpp16m565 && lcdControl.bgr)
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bmp = new Bitmap(VideoConvert::bgr565, width, height, dmaBuffer);
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else if (lcdControl.lcdbpp == bpp16m565 && !lcdControl.bgr)
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bmp = new Bitmap(VideoConvert::rgb565, width, height, dmaBuffer);
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else
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panic("Unimplemented video mode\n");
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}
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void
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Pl111::startDma()
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{
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if (dmaPendingNum != 0 || readEvent.scheduled())
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return;
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readFramebuffer();
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}
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void
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Pl111::readFramebuffer()
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{
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// initialization for dma read from frame buffer to dma buffer
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uint32_t length = height * width;
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if (startAddr != lcdUpbase)
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startAddr = lcdUpbase;
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// Updating base address, interrupt if we're supposed to
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lcdRis.baseaddr = 1;
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if (!intEvent.scheduled())
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schedule(intEvent, clockEdge());
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curAddr = 0;
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startTime = curTick();
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maxAddr = static_cast<Addr>(length * bytesPerPixel);
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DPRINTF(PL111, " lcd frame buffer size of %d bytes \n", maxAddr);
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fillFifo();
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}
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void
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Pl111::fillFifo()
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{
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while ((dmaPendingNum < maxOutstandingDma) && (maxAddr >= curAddr + dmaSize )) {
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// concurrent dma reads need different dma done events
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// due to assertion in scheduling state
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++dmaPendingNum;
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assert(!dmaDoneEventFree.empty());
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DmaDoneEvent *event(dmaDoneEventFree.back());
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dmaDoneEventFree.pop_back();
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assert(!event->scheduled());
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// We use a uncachable request here because the requests from the CPU
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// will be uncacheable as well. If we have uncacheable and cacheable
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// requests in the memory system for the same address it won't be
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// pleased
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dmaPort.dmaAction(MemCmd::ReadReq, curAddr + startAddr, dmaSize,
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event, curAddr + dmaBuffer,
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0, Request::UNCACHEABLE);
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curAddr += dmaSize;
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}
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}
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void
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Pl111::dmaDone()
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{
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DPRINTF(PL111, "DMA Done\n");
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Tick maxFrameTime = lcdTiming2.cpl * height * pixelClock;
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--dmaPendingNum;
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if (maxAddr == curAddr && !dmaPendingNum) {
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if ((curTick() - startTime) > maxFrameTime) {
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warn("CLCD controller buffer underrun, took %d ticks when should"
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" have taken %d\n", curTick() - startTime, maxFrameTime);
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lcdRis.underflow = 1;
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if (!intEvent.scheduled())
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schedule(intEvent, clockEdge());
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}
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assert(!readEvent.scheduled());
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if (vnc)
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vnc->setDirty();
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DPRINTF(PL111, "-- write out frame buffer into bmp\n");
|
|
|
|
if (!pic)
|
|
pic = simout.create(csprintf("%s.framebuffer.bmp", sys->name()), true);
|
|
|
|
assert(bmp);
|
|
assert(pic);
|
|
pic->seekp(0);
|
|
bmp->write(pic);
|
|
|
|
// schedule the next read based on when the last frame started
|
|
// and the desired fps (i.e. maxFrameTime), we turn the
|
|
// argument into a relative number of cycles in the future
|
|
if (lcdControl.lcden)
|
|
schedule(readEvent, clockEdge(ticksToCycles(startTime -
|
|
curTick() +
|
|
maxFrameTime)));
|
|
}
|
|
|
|
if (dmaPendingNum > (maxOutstandingDma - waterMark))
|
|
return;
|
|
|
|
if (!fillFifoEvent.scheduled())
|
|
schedule(fillFifoEvent, clockEdge());
|
|
}
|
|
|
|
void
|
|
Pl111::serialize(std::ostream &os)
|
|
{
|
|
DPRINTF(PL111, "Serializing ARM PL111\n");
|
|
|
|
uint32_t lcdTiming0_serial = lcdTiming0;
|
|
SERIALIZE_SCALAR(lcdTiming0_serial);
|
|
|
|
uint32_t lcdTiming1_serial = lcdTiming1;
|
|
SERIALIZE_SCALAR(lcdTiming1_serial);
|
|
|
|
uint32_t lcdTiming2_serial = lcdTiming2;
|
|
SERIALIZE_SCALAR(lcdTiming2_serial);
|
|
|
|
uint32_t lcdTiming3_serial = lcdTiming3;
|
|
SERIALIZE_SCALAR(lcdTiming3_serial);
|
|
|
|
SERIALIZE_SCALAR(lcdUpbase);
|
|
SERIALIZE_SCALAR(lcdLpbase);
|
|
|
|
uint32_t lcdControl_serial = lcdControl;
|
|
SERIALIZE_SCALAR(lcdControl_serial);
|
|
|
|
uint8_t lcdImsc_serial = lcdImsc;
|
|
SERIALIZE_SCALAR(lcdImsc_serial);
|
|
|
|
uint8_t lcdRis_serial = lcdRis;
|
|
SERIALIZE_SCALAR(lcdRis_serial);
|
|
|
|
uint8_t lcdMis_serial = lcdMis;
|
|
SERIALIZE_SCALAR(lcdMis_serial);
|
|
|
|
SERIALIZE_ARRAY(lcdPalette, LcdPaletteSize);
|
|
SERIALIZE_ARRAY(cursorImage, CrsrImageSize);
|
|
|
|
SERIALIZE_SCALAR(clcdCrsrCtrl);
|
|
SERIALIZE_SCALAR(clcdCrsrConfig);
|
|
SERIALIZE_SCALAR(clcdCrsrPalette0);
|
|
SERIALIZE_SCALAR(clcdCrsrPalette1);
|
|
SERIALIZE_SCALAR(clcdCrsrXY);
|
|
SERIALIZE_SCALAR(clcdCrsrClip);
|
|
|
|
uint8_t clcdCrsrImsc_serial = clcdCrsrImsc;
|
|
SERIALIZE_SCALAR(clcdCrsrImsc_serial);
|
|
|
|
uint8_t clcdCrsrIcr_serial = clcdCrsrIcr;
|
|
SERIALIZE_SCALAR(clcdCrsrIcr_serial);
|
|
|
|
uint8_t clcdCrsrRis_serial = clcdCrsrRis;
|
|
SERIALIZE_SCALAR(clcdCrsrRis_serial);
|
|
|
|
uint8_t clcdCrsrMis_serial = clcdCrsrMis;
|
|
SERIALIZE_SCALAR(clcdCrsrMis_serial);
|
|
|
|
SERIALIZE_SCALAR(height);
|
|
SERIALIZE_SCALAR(width);
|
|
SERIALIZE_SCALAR(bytesPerPixel);
|
|
|
|
SERIALIZE_ARRAY(dmaBuffer, buffer_size);
|
|
SERIALIZE_SCALAR(startTime);
|
|
SERIALIZE_SCALAR(startAddr);
|
|
SERIALIZE_SCALAR(maxAddr);
|
|
SERIALIZE_SCALAR(curAddr);
|
|
SERIALIZE_SCALAR(waterMark);
|
|
SERIALIZE_SCALAR(dmaPendingNum);
|
|
|
|
Tick int_event_time = 0;
|
|
Tick read_event_time = 0;
|
|
Tick fill_fifo_event_time = 0;
|
|
|
|
if (readEvent.scheduled())
|
|
read_event_time = readEvent.when();
|
|
if (fillFifoEvent.scheduled())
|
|
fill_fifo_event_time = fillFifoEvent.when();
|
|
if (intEvent.scheduled())
|
|
int_event_time = intEvent.when();
|
|
|
|
SERIALIZE_SCALAR(read_event_time);
|
|
SERIALIZE_SCALAR(fill_fifo_event_time);
|
|
SERIALIZE_SCALAR(int_event_time);
|
|
|
|
vector<Tick> dma_done_event_tick;
|
|
dma_done_event_tick.resize(maxOutstandingDma);
|
|
for (int x = 0; x < maxOutstandingDma; x++) {
|
|
dma_done_event_tick[x] = dmaDoneEventAll[x].scheduled() ?
|
|
dmaDoneEventAll[x].when() : 0;
|
|
}
|
|
arrayParamOut(os, "dma_done_event_tick", dma_done_event_tick);
|
|
}
|
|
|
|
void
|
|
Pl111::unserialize(Checkpoint *cp, const std::string §ion)
|
|
{
|
|
DPRINTF(PL111, "Unserializing ARM PL111\n");
|
|
|
|
uint32_t lcdTiming0_serial;
|
|
UNSERIALIZE_SCALAR(lcdTiming0_serial);
|
|
lcdTiming0 = lcdTiming0_serial;
|
|
|
|
uint32_t lcdTiming1_serial;
|
|
UNSERIALIZE_SCALAR(lcdTiming1_serial);
|
|
lcdTiming1 = lcdTiming1_serial;
|
|
|
|
uint32_t lcdTiming2_serial;
|
|
UNSERIALIZE_SCALAR(lcdTiming2_serial);
|
|
lcdTiming2 = lcdTiming2_serial;
|
|
|
|
uint32_t lcdTiming3_serial;
|
|
UNSERIALIZE_SCALAR(lcdTiming3_serial);
|
|
lcdTiming3 = lcdTiming3_serial;
|
|
|
|
UNSERIALIZE_SCALAR(lcdUpbase);
|
|
UNSERIALIZE_SCALAR(lcdLpbase);
|
|
|
|
uint32_t lcdControl_serial;
|
|
UNSERIALIZE_SCALAR(lcdControl_serial);
|
|
lcdControl = lcdControl_serial;
|
|
|
|
uint8_t lcdImsc_serial;
|
|
UNSERIALIZE_SCALAR(lcdImsc_serial);
|
|
lcdImsc = lcdImsc_serial;
|
|
|
|
uint8_t lcdRis_serial;
|
|
UNSERIALIZE_SCALAR(lcdRis_serial);
|
|
lcdRis = lcdRis_serial;
|
|
|
|
uint8_t lcdMis_serial;
|
|
UNSERIALIZE_SCALAR(lcdMis_serial);
|
|
lcdMis = lcdMis_serial;
|
|
|
|
UNSERIALIZE_ARRAY(lcdPalette, LcdPaletteSize);
|
|
UNSERIALIZE_ARRAY(cursorImage, CrsrImageSize);
|
|
|
|
UNSERIALIZE_SCALAR(clcdCrsrCtrl);
|
|
UNSERIALIZE_SCALAR(clcdCrsrConfig);
|
|
UNSERIALIZE_SCALAR(clcdCrsrPalette0);
|
|
UNSERIALIZE_SCALAR(clcdCrsrPalette1);
|
|
UNSERIALIZE_SCALAR(clcdCrsrXY);
|
|
UNSERIALIZE_SCALAR(clcdCrsrClip);
|
|
|
|
uint8_t clcdCrsrImsc_serial;
|
|
UNSERIALIZE_SCALAR(clcdCrsrImsc_serial);
|
|
clcdCrsrImsc = clcdCrsrImsc_serial;
|
|
|
|
uint8_t clcdCrsrIcr_serial;
|
|
UNSERIALIZE_SCALAR(clcdCrsrIcr_serial);
|
|
clcdCrsrIcr = clcdCrsrIcr_serial;
|
|
|
|
uint8_t clcdCrsrRis_serial;
|
|
UNSERIALIZE_SCALAR(clcdCrsrRis_serial);
|
|
clcdCrsrRis = clcdCrsrRis_serial;
|
|
|
|
uint8_t clcdCrsrMis_serial;
|
|
UNSERIALIZE_SCALAR(clcdCrsrMis_serial);
|
|
clcdCrsrMis = clcdCrsrMis_serial;
|
|
|
|
UNSERIALIZE_SCALAR(height);
|
|
UNSERIALIZE_SCALAR(width);
|
|
UNSERIALIZE_SCALAR(bytesPerPixel);
|
|
|
|
UNSERIALIZE_ARRAY(dmaBuffer, buffer_size);
|
|
UNSERIALIZE_SCALAR(startTime);
|
|
UNSERIALIZE_SCALAR(startAddr);
|
|
UNSERIALIZE_SCALAR(maxAddr);
|
|
UNSERIALIZE_SCALAR(curAddr);
|
|
UNSERIALIZE_SCALAR(waterMark);
|
|
UNSERIALIZE_SCALAR(dmaPendingNum);
|
|
|
|
Tick int_event_time = 0;
|
|
Tick read_event_time = 0;
|
|
Tick fill_fifo_event_time = 0;
|
|
|
|
UNSERIALIZE_SCALAR(read_event_time);
|
|
UNSERIALIZE_SCALAR(fill_fifo_event_time);
|
|
UNSERIALIZE_SCALAR(int_event_time);
|
|
|
|
if (int_event_time)
|
|
schedule(intEvent, int_event_time);
|
|
if (read_event_time)
|
|
schedule(readEvent, read_event_time);
|
|
if (fill_fifo_event_time)
|
|
schedule(fillFifoEvent, fill_fifo_event_time);
|
|
|
|
vector<Tick> dma_done_event_tick;
|
|
dma_done_event_tick.resize(maxOutstandingDma);
|
|
arrayParamIn(cp, section, "dma_done_event_tick", dma_done_event_tick);
|
|
dmaDoneEventFree.clear();
|
|
for (int x = 0; x < maxOutstandingDma; x++) {
|
|
if (dma_done_event_tick[x])
|
|
schedule(dmaDoneEventAll[x], dma_done_event_tick[x]);
|
|
else
|
|
dmaDoneEventFree.push_back(&dmaDoneEventAll[x]);
|
|
}
|
|
assert(maxOutstandingDma - dmaDoneEventFree.size() == dmaPendingNum);
|
|
|
|
if (lcdControl.lcdpwr) {
|
|
updateVideoParams();
|
|
if (vnc)
|
|
vnc->setDirty();
|
|
}
|
|
}
|
|
|
|
void
|
|
Pl111::generateInterrupt()
|
|
{
|
|
DPRINTF(PL111, "Generate Interrupt: lcdImsc=0x%x lcdRis=0x%x lcdMis=0x%x\n",
|
|
(uint32_t)lcdImsc, (uint32_t)lcdRis, (uint32_t)lcdMis);
|
|
lcdMis = lcdImsc & lcdRis;
|
|
|
|
if (lcdMis.underflow || lcdMis.baseaddr || lcdMis.vcomp || lcdMis.ahbmaster) {
|
|
gic->sendInt(intNum);
|
|
DPRINTF(PL111, " -- Generated\n");
|
|
}
|
|
}
|
|
|
|
AddrRangeList
|
|
Pl111::getAddrRanges() const
|
|
{
|
|
AddrRangeList ranges;
|
|
ranges.push_back(RangeSize(pioAddr, pioSize));
|
|
return ranges;
|
|
}
|
|
|
|
Pl111 *
|
|
Pl111Params::create()
|
|
{
|
|
return new Pl111(this);
|
|
}
|
|
|
|
|