bcfa988a67
This commit changes the fs/linux/arm and learning_gem5 tests as they were previously failing with the Ruby change. The fs/linux/arm long tests require the addition of a new gem5 build, ARM_X86, which builds the ARM and X86 ISAs with the MESI_Two_Level cache hierarchy.
117 lines
4.6 KiB
Python
117 lines
4.6 KiB
Python
# Copyright (c) 2017 Jason Power
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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""" This file creates a set of Ruby caches, the Ruby network, and a simple
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point-to-point topology for the RubyRandomTester to use.
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See Part 3 in the Learning gem5 book:
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http://gem5.org/documentation/learning_gem5/part3/MSIintro
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IMPORTANT: If you modify this file, it's likely that the Learning gem5 book
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also needs to be updated. For now, email Jason <jason@lowepower.com>
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"""
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from msi_caches import (
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DirController,
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L1Cache,
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MyNetwork,
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)
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from m5.defines import buildEnv
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from m5.objects import *
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from m5.util import fatal
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class TestCacheSystem(RubySystem):
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def __init__(self):
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if not "RUBY_PROTOCOL_MSI" in buildEnv:
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fatal("This system assumes MSI from learning gem5!")
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super().__init__()
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def setup(self, system, tester, mem_ctrls):
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"""Set up the Ruby cache subsystem. Note: This can't be done in the
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constructor because many of these items require a pointer to the
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ruby system (self). This causes infinite recursion in initialize()
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if we do this in the __init__.
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Setting up for running the RubyRandomTester is a little different
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than when we're using CPUs.
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"""
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num_testers = tester.num_cpus
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# Ruby's global network.
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self.network = MyNetwork(self)
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# MSI uses 3 virtual networks
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self.number_of_virtual_networks = 3
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self.network.number_of_virtual_networks = 3
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self.controllers = [
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L1Cache(system, self, self) for i in range(num_testers)
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] + [DirController(self, system.mem_ranges, mem_ctrls)]
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self.sequencers = [
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RubySequencer(
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version=i,
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# I/D cache is combined and grab from ctrl
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dcache=self.controllers[i].cacheMemory,
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clk_domain=self.clk_domain,
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ruby_system=self,
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)
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for i in range(num_testers)
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]
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for i, c in enumerate(self.controllers[0 : len(self.sequencers)]):
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c.sequencer = self.sequencers[i]
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self.num_of_sequencers = len(self.sequencers)
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# Create the network and connect the controllers.
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# NOTE: This is quite different if using Garnet!
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self.network.connectControllers(self.controllers)
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self.network.setup_buffers()
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# Set up a proxy port for the system_port. Used for load binaries and
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# other functional-only things.
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self.sys_port_proxy = RubyPortProxy(ruby_system=self)
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system.system_port = self.sys_port_proxy.in_ports
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# Connect up the sequencers to the random tester
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for seq in self.sequencers:
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if seq.support_data_reqs and seq.support_inst_reqs:
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tester.cpuInstDataPort = seq.in_ports
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elif seq.support_data_reqs:
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tester.cpuDataPort = seq.in_ports
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elif seq.support_inst_reqs:
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tester.cpuInstDataPort = seq.in_ports
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# Do not automatically retry stalled Ruby requests
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seq.no_retry_on_stall = True
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# Tell each sequencer this is the ruby tester so that it
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# copies the subblock back to the checker
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seq.using_ruby_tester = True
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