Mitch Hayenga b9a9d99b22 scons: Fixes uninitialized warnings issued by clang ...

Small fixes to appease recent clang versions.

2014-03-07 15:56:23 -05:00

..

alpha

arch: Make all register index flattening const

2014-01-24 15:29:30 -06:00

arm

scons: Fixes uninitialized warnings issued by clang

2014-03-07 15:56:23 -05:00

generic

mem: Remove explict cast from memhelper.

2014-01-24 15:29:30 -06:00

mips

cpu: Enable fast-forwarding for MIPS InOrderCPU and O3CPU

2014-03-01 23:35:23 -06:00

null

mem: Wakeup sleeping CPUs without caches on LLSC

2014-03-07 15:56:23 -05:00

power

arch: Make all register index flattening const

2014-01-24 15:29:30 -06:00

sparc

arch: Make all register index flattening const

2014-01-24 15:29:30 -06:00

x86

x86: Setup correct TSL/TR segment attributes on INIT

2014-03-03 14:44:57 +01:00

isa_parser.py

cpu: add a condition-code register class

2013-10-15 14:22:44 -04:00

micro_asm_test.py

Add a second section to make sure the ROM is extended properly.

2007-05-31 22:21:21 +00:00

micro_asm.py

scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access

2009-09-22 15:24:16 -07:00

SConscript

cpu: add a condition-code register class

2013-10-15 14:22:44 -04:00