Matthew Poremba b91c9be102 arch-vega: Load/stores commonly used with 16b MFMA ...

This implements some missing loads and store that are commonly used in
applications with MFMA instructions to load 16-bit data types into
specific register locations: DS_READ_U16_D16, DS_READ_U16_D16_HI,
BUFFER_LOAD_SHORT_D16, BUFFER_LOAD_SHORT_D16_HI.

Change-Id: Ie22d81ef010328f4541553a9a674764dc16a9f4d

2024-05-20 09:29:46 -05:00

..

amdgpu

arch-vega: Load/stores commonly used with 16b MFMA

2024-05-20 09:29:46 -05:00

arm

arch-arm: Fix 32-bit semihosting ABI (#1142)

2024-05-16 10:28:45 -07:00

generic

arch-generic: Avoid out-of-memory errors for bad semihosting calls (#1143)

2024-05-16 10:28:10 -07:00

isa_parser

arch: Fix inst flag of RISC-V vector store macro instructions

2023-12-12 17:04:31 +08:00

mips

misc: Serialize the ISA as a string in the checkpoint

2024-03-04 17:51:40 +00:00

null

scons: Update the Kconfig build options

2023-11-23 08:26:11 +08:00

power

misc: Serialize the ISA as a string in the checkpoint

2024-03-04 17:51:40 +00:00

riscv

arch-riscv: Fix vrgather instruction (#1134)

2024-05-16 10:12:35 -07:00

sparc

arch-riscv,sim: m5ops argument / return fix for 32 bit RISC-V (#900)

2024-04-08 10:09:17 -07:00

x86

arch-x86: Add XCR0 register and add to X86KvmCPU

2024-04-25 11:24:53 -07:00

Kconfig

scons: Update the Kconfig build options

2023-11-23 08:26:11 +08:00

micro_asm_test.py

misc: Run pre-commit run --all-files

2023-11-29 22:06:41 -08:00

micro_asm.py

misc: Run pre-commit run --all-files

2023-11-29 22:06:41 -08:00

SConscript

arch-gcn3: Remove all GCN3 files

2024-01-17 10:44:44 -06:00